Propagate debug info when building SelectionDAG.

[oota-llvm.git] / include / llvm / CodeGen / ScheduleDAGInstrs.h

diff --git a/include/llvm/CodeGen/ScheduleDAGInstrs.h b/include/llvm/CodeGen/ScheduleDAGInstrs.h
index cfea3e08895c9766af04d28461f1aba8bb44d4a9..7c0e80afe43888eecf1f1529088facb0648cf018 100644 (file)
--- a/include/llvm/CodeGen/ScheduleDAGInstrs.h
+++ b/include/llvm/CodeGen/ScheduleDAGInstrs.h
@@ -16,6 +16,7 @@
 #define LLVM_CODEGEN_SCHEDULEDAGINSTRS_H
 
 #include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 
 namespace llvm {
   class MachineLoopInfo;
@@ -25,11 +26,22 @@ namespace llvm {
     const MachineLoopInfo &MLI;
     const MachineDominatorTree &MDT;
 
+    /// Defs, Uses - Remember where defs and uses of each physical register
+    /// are as we iterate upward through the instructions. This is allocated
+    /// here instead of inside BuildSchedGraph to avoid the need for it to be
+    /// initialized and destructed for each block.
+    std::vector<SUnit *> Defs[TargetRegisterInfo::FirstVirtualRegister];
+    std::vector<SUnit *> Uses[TargetRegisterInfo::FirstVirtualRegister];
+
+    /// PendingLoads - Remember where unknown loads are after the most recent
+    /// unknown store, as we iterate. As with Defs and Uses, this is here
+    /// to minimize construction/destruction.
+    std::vector<SUnit *> PendingLoads;
+
   public:
-    ScheduleDAGInstrs(MachineBasicBlock *bb,
-                      const TargetMachine &tm,
-                      const MachineLoopInfo &mli,
-                      const MachineDominatorTree &mdt);
+    explicit ScheduleDAGInstrs(MachineFunction &mf,
+                               const MachineLoopInfo &mli,
+                               const MachineDominatorTree &mdt);
 
     virtual ~ScheduleDAGInstrs() {}
 
@@ -37,17 +49,18 @@ namespace llvm {
     ///
     SUnit *NewSUnit(MachineInstr *MI) {
 #ifndef NDEBUG
-      const SUnit *Addr = &SUnits[0];
+      const SUnit *Addr = SUnits.empty() ? 0 : &SUnits[0];
 #endif
       SUnits.push_back(SUnit(MI, (unsigned)SUnits.size()));
-      assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on the fly!");
+      assert((Addr == 0 || Addr == &SUnits[0]) &&
+             "SUnits std::vector reallocated on the fly!");
       SUnits.back().OrigNode = &SUnits.back();
       return &SUnits.back();
     }
 
-    /// BuildSchedUnits - Build SUnits from the MachineBasicBlock that we are
+    /// BuildSchedGraph - Build SUnits from the MachineBasicBlock that we are
     /// input.
-    virtual void BuildSchedUnits();
+    virtual void BuildSchedGraph();
 
     /// ComputeLatency - Compute node latency.
     ///