Add DebugLoc field and simple accessors.

[oota-llvm.git] / include / llvm / CodeGen / SchedulerRegistry.h

diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h
index db70dee6c5b16e1a0266c6e8fd7edf25fdf279ca..b4daa05203c896f1982fe11413035e7525217f88 100644 (file)
--- a/include/llvm/CodeGen/SchedulerRegistry.h
+++ b/include/llvm/CodeGen/SchedulerRegistry.h
@@ -31,11 +31,8 @@ class SelectionDAG;
 class MachineBasicBlock;
 
 class RegisterScheduler : public MachinePassRegistryNode {
-
 public:
-
-  typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, SelectionDAG*,
-                                        MachineBasicBlock*, bool);
+  typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, bool);
 
   static MachinePassRegistry Registry;
 
@@ -62,10 +59,33 @@ public:
   static void setListener(MachinePassRegistryListener *L) {
     Registry.setListener(L);
   }
-  
 };
 
-} // end namespace llvm
+/// createBURRListDAGScheduler - This creates a bottom up register usage
+/// reduction list scheduler.
+ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,
+                                        bool Fast);
+
+/// createTDRRListDAGScheduler - This creates a top down register usage
+/// reduction list scheduler.
+ScheduleDAG* createTDRRListDAGScheduler(SelectionDAGISel *IS,
+                                        bool Fast);
 
+/// createTDListDAGScheduler - This creates a top-down list scheduler with
+/// a hazard recognizer.
+ScheduleDAG* createTDListDAGScheduler(SelectionDAGISel *IS,
+                                      bool Fast);
+
+/// createFastDAGScheduler - This creates a "fast" scheduler.
+///
+ScheduleDAG *createFastDAGScheduler(SelectionDAGISel *IS,
+                                    bool Fast);
+
+/// createDefaultScheduler - This creates an instruction scheduler appropriate
+/// for the target.
+ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS,
+                                    bool Fast);
+
+} // end namespace llvm
 
 #endif