Add DebugLoc-aware constructors for SDNode derived

[oota-llvm.git] / include / llvm / CodeGen / SchedulerRegistry.h

diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h
index d7e39aecbd346153c74439ab27bb6d7d80754eff..b4daa05203c896f1982fe11413035e7525217f88 100644 (file)
--- a/include/llvm/CodeGen/SchedulerRegistry.h
+++ b/include/llvm/CodeGen/SchedulerRegistry.h
@@ -32,9 +32,7 @@ class MachineBasicBlock;
 
 class RegisterScheduler : public MachinePassRegistryNode {
 public:
-  typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, SelectionDAG*,
-                                        const TargetMachine *,
-                                        MachineBasicBlock*, bool);
+  typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, bool);
 
   static MachinePassRegistry Registry;
 
@@ -66,44 +64,28 @@ public:
 /// createBURRListDAGScheduler - This creates a bottom up register usage
 /// reduction list scheduler.
 ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,
-                                        SelectionDAG *DAG,
-                                        const TargetMachine *TM,
-                                        MachineBasicBlock *BB,
                                         bool Fast);
 
 /// createTDRRListDAGScheduler - This creates a top down register usage
 /// reduction list scheduler.
 ScheduleDAG* createTDRRListDAGScheduler(SelectionDAGISel *IS,
-                                        SelectionDAG *DAG,
-                                        const TargetMachine *TM,
-                                        MachineBasicBlock *BB,
                                         bool Fast);
 
 /// createTDListDAGScheduler - This creates a top-down list scheduler with
 /// a hazard recognizer.
 ScheduleDAG* createTDListDAGScheduler(SelectionDAGISel *IS,
-                                      SelectionDAG *DAG,
-                                      const TargetMachine *TM,
-                                      MachineBasicBlock *BB,
                                       bool Fast);
-                                      
+
 /// createFastDAGScheduler - This creates a "fast" scheduler.
 ///
 ScheduleDAG *createFastDAGScheduler(SelectionDAGISel *IS,
-                                    SelectionDAG *DAG,
-                                    const TargetMachine *TM,
-                                    MachineBasicBlock *BB,
                                     bool Fast);
 
 /// createDefaultScheduler - This creates an instruction scheduler appropriate
 /// for the target.
 ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS,
-                                    SelectionDAG *DAG,
-                                    const TargetMachine *TM,
-                                    MachineBasicBlock *BB,
                                     bool Fast);
 
 } // end namespace llvm
 
-
 #endif