class TargetLowering;
class TargetMachine;
class MachineModuleInfo;
+class DwarfWriter;
class MachineFunction;
class MachineConstantPoolValue;
class FunctionLoweringInfo;
static void createNode(const SDNode &);
};
+enum CombineLevel {
+ Unrestricted, // Combine may create illegal operations and illegal types.
+ NoIllegalTypes, // Combine may create illegal operations but no illegal types.
+ NoIllegalOperations // Combine may only create legal operations and types.
+};
+
/// SelectionDAG class - This is used to represent a portion of an LLVM function
/// in a low-level Data Dependence DAG representation suitable for instruction
/// selection. This DAG is constructed as the first step of instruction
MachineFunction *MF;
FunctionLoweringInfo &FLI;
MachineModuleInfo *MMI;
+ DwarfWriter *DW;
/// EntryNode - The starting token.
SDNode EntryNode;
/// init - Prepare this SelectionDAG to process code in the given
/// MachineFunction.
///
- void init(MachineFunction &mf, MachineModuleInfo *mmi);
+ void init(MachineFunction &mf, MachineModuleInfo *mmi, DwarfWriter *dw);
/// clear - Clear state and free memory necessary to make this
/// SelectionDAG ready to process a new block.
TargetLowering &getTargetLoweringInfo() const { return TLI; }
FunctionLoweringInfo &getFunctionLoweringInfo() const { return FLI; }
MachineModuleInfo *getMachineModuleInfo() const { return MMI; }
+ DwarfWriter *getDwarfWriter() const { return DW; }
/// viewGraph - Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
///
}
/// Combine - This iterates over the nodes in the SelectionDAG, folding
- /// certain types of nodes together, or eliminating superfluous nodes. When
- /// the AfterLegalize argument is set to 'true', Combine takes care not to
- /// generate any nodes that will be illegal on the target.
- void Combine(bool AfterLegalize, AliasAnalysis &AA, bool Fast);
-
+ /// certain types of nodes together, or eliminating superfluous nodes. The
+ /// Level argument controls whether Combine is allowed to produce nodes and
+ /// types that are illegal on the target.
+ void Combine(CombineLevel Level, AliasAnalysis &AA, bool Fast);
+
/// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that
- /// only uses types natively supported by the target.
+ /// only uses types natively supported by the target. Returns "true" if it
+ /// made any changes.
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
- void LegalizeTypes();
-
+ bool LegalizeTypes();
+
/// Legalize - This transforms the SelectionDAG into a SelectionDAG that is
/// compatible with the target instruction selector, as indicated by the
/// TargetLowering object.
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
- void Legalize();
+ void Legalize(bool TypesNeedLegalizing);
/// RemoveDeadNodes - This method deletes all unreachable nodes in the
/// SelectionDAG.
SDVTList getVTList(MVT VT);
SDVTList getVTList(MVT VT1, MVT VT2);
SDVTList getVTList(MVT VT1, MVT VT2, MVT VT3);
+ SDVTList getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4);
SDVTList getVTList(const MVT *VTs, unsigned NumVTs);
/// getNodeValueTypes - These are obsolete, use getVTList instead.
const MVT *getNodeValueTypes(MVT VT1, MVT VT2, MVT VT3) {
return getVTList(VT1, VT2, VT3).VTs;
}
+ const MVT *getNodeValueTypes(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
+ return getVTList(VT1, VT2, VT3, VT4).VTs;
+ }
const MVT *getNodeValueTypes(const std::vector<MVT> &vtList) {
return getVTList(&vtList[0], (unsigned)vtList.size()).VTs;
}
SDValue getValueType(MVT);
SDValue getRegister(unsigned Reg, MVT VT);
SDValue getDbgStopPoint(SDValue Root, unsigned Line, unsigned Col,
- const CompileUnitDesc *CU);
+ Value *CU);
SDValue getLabel(unsigned Opcode, SDValue Root, unsigned LabelID);
SDValue getCopyToReg(SDValue Chain, unsigned Reg, SDValue N) {
SDValue getCondCode(ISD::CondCode Cond);
+ /// Returns the ConvertRndSat Note: Avoid using this node because it may
+ /// disappear in the future and most targets don't support it.
+ SDValue getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, SDValue STy,
+ SDValue Rnd, SDValue Sat, ISD::CvtCode Code);
+
/// getZeroExtendInReg - Return the expression required to zero extend the Op
/// value assuming it was the smaller SrcTy value.
SDValue getZeroExtendInReg(SDValue Op, MVT SrcTy);
+ /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
+ SDValue getNOT(SDValue Val, MVT VT);
+
/// getCALLSEQ_START - Return a new CALLSEQ_START node, which always must have
/// a flag result (to ensure it's not CSE'd).
SDValue getCALLSEQ_START(SDValue Chain, SDValue Op) {
SDValue getNode(unsigned Opcode, SDVTList VTs, SDValue N);
SDValue getNode(unsigned Opcode, SDVTList VTs, SDValue N1, SDValue N2);
SDValue getNode(unsigned Opcode, SDVTList VTs,
- SDValue N1, SDValue N2, SDValue N3);
+ SDValue N1, SDValue N2, SDValue N3);
SDValue getNode(unsigned Opcode, SDVTList VTs,
- SDValue N1, SDValue N2, SDValue N3, SDValue N4);
+ SDValue N1, SDValue N2, SDValue N3, SDValue N4);
SDValue getNode(unsigned Opcode, SDVTList VTs,
- SDValue N1, SDValue N2, SDValue N3, SDValue N4,
- SDValue N5);
+ SDValue N1, SDValue N2, SDValue N3, SDValue N4,
+ SDValue N5);
SDValue getNode(unsigned Opcode, SDVTList VTs,
- const SDValue *Ops, unsigned NumOps);
+ const SDValue *Ops, unsigned NumOps);
SDValue getMemcpy(SDValue Chain, SDValue Dst, SDValue Src,
- SDValue Size, unsigned Align,
- bool AlwaysInline,
- const Value *DstSV, uint64_t DstSVOff,
- const Value *SrcSV, uint64_t SrcSVOff);
+ SDValue Size, unsigned Align, bool AlwaysInline,
+ const Value *DstSV, uint64_t DstSVOff,
+ const Value *SrcSV, uint64_t SrcSVOff);
SDValue getMemmove(SDValue Chain, SDValue Dst, SDValue Src,
- SDValue Size, unsigned Align,
- const Value *DstSV, uint64_t DstOSVff,
- const Value *SrcSV, uint64_t SrcSVOff);
+ SDValue Size, unsigned Align,
+ const Value *DstSV, uint64_t DstOSVff,
+ const Value *SrcSV, uint64_t SrcSVOff);
SDValue getMemset(SDValue Chain, SDValue Dst, SDValue Src,
- SDValue Size, unsigned Align,
- const Value *DstSV, uint64_t DstSVOff);
+ SDValue Size, unsigned Align,
+ const Value *DstSV, uint64_t DstSVOff);
/// getSetCC - Helper function to make it easier to build SetCC's if you just
/// have an ISD::CondCode instead of an SDValue.
///
SDValue getSetCC(MVT VT, SDValue LHS, SDValue RHS,
- ISD::CondCode Cond) {
+ ISD::CondCode Cond) {
return getNode(ISD::SETCC, VT, LHS, RHS, getCondCode(Cond));
}
/// if you just have an ISD::CondCode instead of an SDValue.
///
SDValue getVSetCC(MVT VT, SDValue LHS, SDValue RHS,
- ISD::CondCode Cond) {
+ ISD::CondCode Cond) {
return getNode(ISD::VSETCC, VT, LHS, RHS, getCondCode(Cond));
}
/// just have an ISD::CondCode instead of an SDValue.
///
SDValue getSelectCC(SDValue LHS, SDValue RHS,
- SDValue True, SDValue False, ISD::CondCode Cond) {
+ SDValue True, SDValue False, ISD::CondCode Cond) {
return getNode(ISD::SELECT_CC, True.getValueType(), LHS, RHS, True, False,
getCondCode(Cond));
}
/// getVAArg - VAArg produces a result and token chain, and takes a pointer
/// and a source value as input.
SDValue getVAArg(MVT VT, SDValue Chain, SDValue Ptr,
- SDValue SV);
+ SDValue SV);
/// getAtomic - Gets a node for an atomic op, produces result and chain and
/// takes 3 operands
- SDValue getAtomic(unsigned Opcode, SDValue Chain, SDValue Ptr,
- SDValue Cmp, SDValue Swp, const Value* PtrVal,
- unsigned Alignment=0);
+ SDValue getAtomic(unsigned Opcode, MVT MemVT, SDValue Chain, SDValue Ptr,
+ SDValue Cmp, SDValue Swp, const Value* PtrVal,
+ unsigned Alignment=0);
/// getAtomic - Gets a node for an atomic op, produces result and chain and
/// takes 2 operands.
- SDValue getAtomic(unsigned Opcode, SDValue Chain, SDValue Ptr,
- SDValue Val, const Value* PtrVal,
- unsigned Alignment = 0);
+ SDValue getAtomic(unsigned Opcode, MVT MemVT, SDValue Chain, SDValue Ptr,
+ SDValue Val, const Value* PtrVal,
+ unsigned Alignment = 0);
/// getMemIntrinsicNode - Creates a MemIntrinsicNode that may produce a
/// result and takes a list of operands.
bool ReadMem = true, bool WriteMem = true);
/// getMergeValues - Create a MERGE_VALUES node from the given operands.
- /// Allowed to return something different (and simpler) if Simplify is true.
- SDValue getMergeValues(const SDValue *Ops, unsigned NumOps,
- bool Simplify = true);
-
- /// getMergeValues - Create a MERGE_VALUES node from the given types and ops.
- /// Allowed to return something different (and simpler) if Simplify is true.
- /// May be faster than the above version if VTs is known and NumOps is large.
- SDValue getMergeValues(SDVTList VTs, const SDValue *Ops, unsigned NumOps,
- bool Simplify = true) {
- if (Simplify && NumOps == 1)
- return Ops[0];
- return getNode(ISD::MERGE_VALUES, VTs, Ops, NumOps);
- }
+ SDValue getMergeValues(const SDValue *Ops, unsigned NumOps);
/// getCall - Create a CALL node from the given information.
///
MVT VT2, const SDValue *Ops, unsigned NumOps);
SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
MVT VT2, MVT VT3, const SDValue *Ops, unsigned NumOps);
+ SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, MVT VT1,
+ MVT VT2, MVT VT3, MVT VT4, const SDValue *Ops,
+ unsigned NumOps);
SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
MVT VT2, SDValue Op1);
SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
MVT VT2, SDValue Op1, SDValue Op2);
SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
MVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
+ SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
+ MVT VT2, MVT VT3, SDValue Op1, SDValue Op2, SDValue Op3);
SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, SDVTList VTs,
const SDValue *Ops, unsigned NumOps);
/// informed about nodes that are deleted and modified due to recursive
/// changes in the dag.
///
+ /// These functions only replace all existing uses. It's possible that as
+ /// these replacements are being performed, CSE may cause the From node
+ /// to be given new uses. These new uses of From are left in place, and
+ /// not automatically transfered to To.
+ ///
void ReplaceAllUsesWith(SDValue From, SDValue Op,
DAGUpdateListener *UpdateListener = 0);
void ReplaceAllUsesWith(SDNode *From, SDNode *To,
/// specified value type. If minAlign is specified, the slot size will have
/// at least that alignment.
SDValue CreateStackTemporary(MVT VT, unsigned minAlign = 1);
-
+
+ /// CreateStackTemporary - Create a stack temporary suitable for holding
+ /// either of the specified value types.
+ SDValue CreateStackTemporary(MVT VT1, MVT VT2);
+
/// FoldConstantArithmetic -
SDValue FoldConstantArithmetic(unsigned Opcode,
MVT VT,
private:
bool RemoveNodeFromCSEMaps(SDNode *N);
- SDNode *AddNonLeafNodeToCSEMaps(SDNode *N);
+ void AddModifiedNodeToCSEMaps(SDNode *N, DAGUpdateListener *UpdateListener);
SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2,
void *&InsertPos);
void *&InsertPos);
void DeleteNodeNotInCSEMaps(SDNode *N);
+ void DeallocateNode(SDNode *N);
unsigned getMVTAlignment(MVT MemoryVT) const;
projects / oota-llvm.git / blobdiff