template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> {
private:
- mutable SDNode Sentinel;
+ mutable ilist_node<SDNode> Sentinel;
public:
- ilist_traits() : Sentinel(ISD::DELETED_NODE, DebugLoc::getUnknownLoc(),
- SDVTList()) {}
-
SDNode *createSentinel() const {
- return &Sentinel;
+ return static_cast<SDNode*>(&Sentinel);
}
static void destroySentinel(SDNode *) {}
+ SDNode *provideInitialHead() const { return createSentinel(); }
+ SDNode *ensureHead(SDNode*) const { return createSentinel(); }
+ static void noteHead(SDNode*, SDNode*) {}
+
static void deleteNode(SDNode *) {
assert(0 && "ilist_traits<SDNode> shouldn't see a deleteNode call!");
}
/// setGraphColorHelper - Implementation of setSubgraphColor.
/// Return whether we had to truncate the search.
///
- bool setSubgraphColorHelper(SDNode *N, const char *Color, DenseSet<SDNode *> &visited,
+ bool setSubgraphColorHelper(SDNode *N, const char *Color,
+ DenseSet<SDNode *> &visited,
int level, bool &printed);
public:
/// certain types of nodes together, or eliminating superfluous nodes. The
/// Level argument controls whether Combine is allowed to produce nodes and
/// types that are illegal on the target.
- void Combine(CombineLevel Level, AliasAnalysis &AA, bool Fast);
+ void Combine(CombineLevel Level, AliasAnalysis &AA, unsigned OptLevel);
/// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that
/// only uses types natively supported by the target. Returns "true" if it
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
- void Legalize(bool TypesNeedLegalizing);
+ void Legalize(bool TypesNeedLegalizing, unsigned OptLevel);
/// RemoveDeadNodes - This method deletes all unreachable nodes in the
/// SelectionDAG.
SDVTList getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4);
SDVTList getVTList(const MVT *VTs, unsigned NumVTs);
- /// getNodeValueTypes - These are obsolete, use getVTList instead.
- const MVT *getNodeValueTypes(MVT VT) {
- return getVTList(VT).VTs;
- }
- const MVT *getNodeValueTypes(MVT VT1, MVT VT2) {
- return getVTList(VT1, VT2).VTs;
- }
- const MVT *getNodeValueTypes(MVT VT1, MVT VT2, MVT VT3) {
- return getVTList(VT1, VT2, VT3).VTs;
- }
- const MVT *getNodeValueTypes(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
- return getVTList(VT1, VT2, VT3, VT4).VTs;
- }
- const MVT *getNodeValueTypes(const std::vector<MVT> &vtList) {
- return getVTList(&vtList[0], (unsigned)vtList.size()).VTs;
- }
-
-
//===--------------------------------------------------------------------===//
// Node creation methods.
//
// null) and that there should be a flag result.
SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N,
SDValue Flag) {
- const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
+ SDVTList VTs = getVTList(MVT::Other, MVT::Flag);
SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
- return getNode(ISD::CopyToReg, dl, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
+ return getNode(ISD::CopyToReg, dl, VTs, Ops, Flag.getNode() ? 4 : 3);
}
// Similar to last getCopyToReg() except parameter Reg is a SDValue
SDValue getCopyToReg(SDValue Chain, DebugLoc dl, SDValue Reg, SDValue N,
SDValue Flag) {
- const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
+ SDVTList VTs = getVTList(MVT::Other, MVT::Flag);
SDValue Ops[] = { Chain, Reg, N, Flag };
- return getNode(ISD::CopyToReg, dl, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
+ return getNode(ISD::CopyToReg, dl, VTs, Ops, Flag.getNode() ? 4 : 3);
}
SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT) {
- const MVT *VTs = getNodeValueTypes(VT, MVT::Other);
+ SDVTList VTs = getVTList(VT, MVT::Other);
SDValue Ops[] = { Chain, getRegister(Reg, VT) };
- return getNode(ISD::CopyFromReg, dl, VTs, 2, Ops, 2);
+ return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
}
// This version of the getCopyFromReg method takes an extra operand, which
// null) and that there should be a flag result.
SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT,
SDValue Flag) {
- const MVT *VTs = getNodeValueTypes(VT, MVT::Other, MVT::Flag);
+ SDVTList VTs = getVTList(VT, MVT::Other, MVT::Flag);
SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag };
- return getNode(ISD::CopyFromReg, dl, VTs, 3, Ops, Flag.getNode() ? 3 : 2);
+ return getNode(ISD::CopyFromReg, dl, VTs, Ops, Flag.getNode() ? 3 : 2);
}
SDValue getCondCode(ISD::CondCode Cond);
SDValue getConvertRndSat(MVT VT, DebugLoc dl, SDValue Val, SDValue DTy,
SDValue STy,
SDValue Rnd, SDValue Sat, ISD::CvtCode Code);
+
+ /// getVectorShuffle - Return an ISD::VECTOR_SHUFFLE node. The number of
+ /// elements in VT, which must be a vector type, must match the number of
+ /// mask elements NumElts. A negative integer mask element is treated as
+ /// undefined.
+ SDValue getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1, SDValue N2,
+ const int *MaskElts);
/// getZeroExtendInReg - Return the expression required to zero extend the Op
/// value assuming it was the smaller SrcTy value.
/// a flag result (to ensure it's not CSE'd). CALLSEQ_START does not have a
/// useful DebugLoc.
SDValue getCALLSEQ_START(SDValue Chain, SDValue Op) {
- const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
+ SDVTList VTs = getVTList(MVT::Other, MVT::Flag);
SDValue Ops[] = { Chain, Op };
return getNode(ISD::CALLSEQ_START, DebugLoc::getUnknownLoc(),
- VTs, 2, Ops, 2);
+ VTs, Ops, 2);
}
/// getCALLSEQ_END - Return a new CALLSEQ_END node, which always must have a
/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
/// This can cause recursive merging of nodes in the DAG. Use the first
/// version if 'From' is known to have a single result, use the second
- /// if you have two nodes with identical results, use the third otherwise.
+ /// if you have two nodes with identical results (or if 'To' has a superset
+ /// of the results of 'From'), use the third otherwise.
///
/// These methods all take an optional UpdateListener, which (if not null) is
/// informed about nodes that are deleted and modified due to recursive
case ISD::AND:
case ISD::OR:
case ISD::XOR:
+ case ISD::SADDO:
+ case ISD::UADDO:
case ISD::ADDC:
case ISD::ADDE: return true;
default: return false;