Constant, ConstantFP,
GlobalAddress, FrameIndex, ConstantPool, ExternalSymbol,
- // ConstantVec works like Constant or ConstantFP, except that it is not a
- // leaf node. All operands are either Constant or ConstantFP nodes.
- ConstantVec,
-
// TargetConstant* - Like Constant*, but the DAG does not do any folding or
// simplification of the constant.
TargetConstant,
TargetConstantFP,
- TargetConstantVec,
// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
// anything else with this node, and this is valid in the target-specific
TargetFrameIndex,
TargetConstantPool,
TargetExternalSymbol,
-
- // Abstract version of ConstantVec with abstract Vector type. The first node
- // is a constant element count, the second is a value type indicating the
- // type of the elements.
- VConstant,
-
+
+ /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
+ /// This node represents a target intrinsic function with no side effects.
+ /// The first operand is the ID number of the intrinsic from the
+ /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
+ /// node has returns the result of the intrinsic.
+ INTRINSIC_WO_CHAIN,
+
+ /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
+ /// This node represents a target intrinsic function with side effects that
+ /// returns a result. The first operand is a chain pointer. The second is
+ /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
+ /// operands to the intrinsic follow. The node has two results, the result
+ /// of the intrinsic and an output chain.
+ INTRINSIC_W_CHAIN,
+
+ /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
+ /// This node represents a target intrinsic function with side effects that
+ /// does not return a result. The first operand is a chain pointer. The
+ /// second is the ID number of the intrinsic from the llvm::Intrinsic
+ /// namespace. The operands to the intrinsic follow.
+ INTRINSIC_VOID,
+
// CopyToReg - This node has three operands: a chain, a register number to
// set to this value, and a value.
CopyToReg,
// Simple binary floating point operators.
FADD, FSUB, FMUL, FDIV, FREM,
-
- // Simple abstract vector operators. Unlike the integer and floating point
- // binary operators, these nodes also take two additional operands:
- // a constant element count, and a value type node indicating the type of
- // the elements. The order is count, type, op0, op1. All vector opcodes,
- // including VLOAD and VConstant must currently have count and type as
- // their 1st and 2nd arguments.
- VADD, VSUB, VMUL,
+ // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
+ // DAG node does not require that X and Y have the same type, just that they
+ // are both floating point. X and the result must have the same type.
+ // FCOPYSIGN(f32, f64) is allowed.
+ FCOPYSIGN,
+
+ /// VBUILD_VECTOR(ELT1, ELT2, ELT3, ELT4,..., COUNT,TYPE) - Return a vector
+ /// with the specified, possibly variable, elements. The number of elements
+ /// is required to be a power of two.
+ VBUILD_VECTOR,
+
+ /// BUILD_VECTOR(ELT1, ELT2, ELT3, ELT4,...) - Return a vector
+ /// with the specified, possibly variable, elements. The number of elements
+ /// is required to be a power of two.
+ BUILD_VECTOR,
+
+ /// VINSERT_VECTOR_ELT(VECTOR, VAL, IDX, COUNT,TYPE) - Given a vector
+ /// VECTOR, an element ELEMENT, and a (potentially variable) index IDX,
+ /// return an vector with the specified element of VECTOR replaced with VAL.
+ /// COUNT and TYPE specify the type of vector, as is standard for V* nodes.
+ VINSERT_VECTOR_ELT,
+
+ /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR (a legal packed
+ /// type) with the element at IDX replaced with VAL.
+ INSERT_VECTOR_ELT,
+
+ /// VEXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
+ /// (an MVT::Vector value) identified by the (potentially variable) element
+ /// number IDX.
+ VEXTRACT_VECTOR_ELT,
+
+ /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
+ /// (a legal packed type vector) identified by the (potentially variable)
+ /// element number IDX.
+ EXTRACT_VECTOR_ELT,
+
+ /// VVECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC, COUNT,TYPE) - Returns a vector,
+ /// of the same type as VEC1/VEC2. SHUFFLEVEC is a VBUILD_VECTOR of
+ /// constant int values that indicate which value each result element will
+ /// get. The elements of VEC1/VEC2 are enumerated in order. This is quite
+ /// similar to the Altivec 'vperm' instruction, except that the indices must
+ /// be constants and are in terms of the element size of VEC1/VEC2, not in
+ /// terms of bytes.
+ VVECTOR_SHUFFLE,
+
+ /// VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same
+ /// type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values
+ /// (regardless of whether its datatype is legal or not) that indicate
+ /// which value each result element will get. The elements of VEC1/VEC2 are
+ /// enumerated in order. This is quite similar to the Altivec 'vperm'
+ /// instruction, except that the indices must be constants and are in terms
+ /// of the element size of VEC1/VEC2, not in terms of bytes.
+ VECTOR_SHUFFLE,
+
+ /// X = VBIT_CONVERT(Y) and X = VBIT_CONVERT(Y, COUNT,TYPE) - This node
+ /// represents a conversion from or to an ISD::Vector type.
+ ///
+ /// This is lowered to a BIT_CONVERT of the appropriate input/output types.
+ /// The input and output are required to have the same size and at least one
+ /// is required to be a vector (if neither is a vector, just use
+ /// BIT_CONVERT).
+ ///
+ /// If the result is a vector, this takes three operands (like any other
+ /// vector producer) which indicate the size and type of the vector result.
+ /// Otherwise it takes one input.
+ VBIT_CONVERT,
+
+ /// BINOP(LHS, RHS, COUNT,TYPE)
+ /// Simple abstract vector operators. Unlike the integer and floating point
+ /// binary operators, these nodes also take two additional operands:
+ /// a constant element count, and a value type node indicating the type of
+ /// the elements. The order is count, type, op0, op1. All vector opcodes,
+ /// including VLOAD and VConstant must currently have count and type as
+ /// their last two operands.
+ VADD, VSUB, VMUL, VSDIV, VUDIV,
+ VAND, VOR, VXOR,
+
+ /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
+ /// scalar value into the low element of the resultant vector type. The top
+ /// elements of the vector are undefined.
+ SCALAR_TO_VECTOR,
+
// MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
// an unsigned/signed value of type i[2*n], then return the top part.
MULHU, MULHS,
// Counting operators
CTTZ, CTLZ, CTPOP,
- // Select
+ // Select(COND, TRUEVAL, FALSEVAL)
SELECT,
// Select with condition operator - This selects between a true value and
// FNEG, FABS, FSQRT, FSIN, FCOS - Perform unary floating point negation,
// absolute value, square root, sine and cosine operations.
FNEG, FABS, FSQRT, FSIN, FCOS,
-
+
// Other operators. LOAD and STORE have token chains as their first
// operand, then the same operands as an LLVM load/store instruction, then a
// SRCVALUE node that provides alias analysis information.
// integer result type.
// ZEXTLOAD loads the integer operand and zero extends it to a larger
// integer result type.
- // EXTLOAD is used for two things: floating point extending loads, and
- // integer extending loads where it doesn't matter what the high
- // bits are set to. The code generator is allowed to codegen this
- // into whichever operation is more efficient.
+ // EXTLOAD is used for three things: floating point extending loads,
+ // integer extending loads [the top bits are undefined], and vector
+ // extending loads [load into low elt].
EXTLOAD, SEXTLOAD, ZEXTLOAD,
// TRUNCSTORE - This operators truncates (for integer) or rounds (for FP) a
// to if the condition is true.
BRCOND,
- // BRCONDTWOWAY - Two-way conditional branch. The first operand is the
- // chain, the second is the condition, the third is the block to branch to
- // if true, and the forth is the block to branch to if false. Targets
- // usually do not implement this, preferring to have legalize demote the
- // operation to BRCOND/BR pairs when necessary.
- BRCONDTWOWAY,
-
// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
// that the condition is represented as condition code, and two nodes to
// compare, rather than as a combined SetCC node. The operands in order are
// chain, cc, lhs, rhs, block to branch to if condition is true.
BR_CC,
- // BRTWOWAY_CC - Two-way conditional branch. The operands in order are
- // chain, cc, lhs, rhs, block to branch to if condition is true, block to
- // branch to if condition is false. Targets usually do not implement this,
- // preferring to have legalize demote the operation to BRCOND/BR pairs.
- BRTWOWAY_CC,
-
// RET - Return from function. The first operand is the chain,
// and any subsequent operands are the return values for the
// function. This operation can have variable number of operands.
BUILTIN_OP_END
};
+ /// Node predicates
+
+ /// isBuildVectorAllOnes - Return true if the specified node is a
+ /// BUILD_VECTOR where all of the elements are ~0 or undef.
+ bool isBuildVectorAllOnes(const SDNode *N);
+
+ /// isBuildVectorAllZeros - Return true if the specified node is a
+ /// BUILD_VECTOR where all of the elements are 0 or undef.
+ bool isBuildVectorAllZeros(const SDNode *N);
+
//===--------------------------------------------------------------------===//
/// ISD::CondCode enum - These are ordered carefully to make the bitfields
/// below work out, when considering SETFALSE (something that never exists
return SDOperand(Val, R);
}
+ // isOperand - Return true if this node is an operand of N.
+ bool isOperand(SDNode *N) const;
+
/// getValueType - Return the ValueType of the referenced return value.
///
inline MVT::ValueType getValueType() const;
inline const SDOperand &getOperand(unsigned i) const;
inline bool isTargetOpcode() const;
inline unsigned getTargetOpcode() const;
- inline const bool isOperand(SDNode *N) const;
/// hasOneUse - Return true if there is exactly one operation using this
/// result value of the defining operator.
inline unsigned SDOperand::getTargetOpcode() const {
return Val->getTargetOpcode();
}
-inline const bool SDOperand::isOperand(SDNode *N) const {
- return Val->isOperand(N);
-}
inline bool SDOperand::hasOneUse() const {
return Val->hasNUsesOfValue(1, ResNo);
}
bool isNullValue() const { return Value == 0; }
bool isAllOnesValue() const {
- int NumBits = MVT::getSizeInBits(getValueType(0));
- if (NumBits == 64) return Value+1 == 0;
- return Value == (1ULL << NumBits)-1;
+ return Value == MVT::getIntVTBitMask(getValueType(0));
}
static bool classof(const ConstantSDNode *) { return true; }
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