Rename some GC classes so that their roll will hopefully be clearer.

[oota-llvm.git] / include / llvm / CodeGen / ValueTypes.td

diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td
index 4e384adc2cf4d4b0994f8efcbe996c7a2becf8c3..844b8db13e85fbfb7bc1dca7cc108cfaa1d9a4f1 100644 (file)
--- a/include/llvm/CodeGen/ValueTypes.td
+++ b/include/llvm/CodeGen/ValueTypes.td
@@ -2,8 +2,8 @@
 // 
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by Chris Lattner and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 // 
 //===----------------------------------------------------------------------===//
 //
@@ -30,20 +30,34 @@ def f32    : ValueType<32 ,  7>;   // 32-bit floating point value
 def f64    : ValueType<64 ,  8>;   // 64-bit floating point value
 def f80    : ValueType<80 ,  9>;   // 80-bit floating point value
 def f128   : ValueType<128, 10>;   // 128-bit floating point value
-def FlagVT : ValueType<0  , 11>;   // Condition code or machine flag
-def isVoid : ValueType<0  , 12>;   // Produces no value
-def Vector : ValueType<0  , 13>;   // Abstract vector value
+def ppcf128: ValueType<128, 11>;   // PPC 128-bit floating point value
+def FlagVT : ValueType<0  , 12>;   // Condition code or machine flag
+def isVoid : ValueType<0  , 13>;   // Produces no value
 def v8i8   : ValueType<64 , 14>;   //  8 x i8  vector value
 def v4i16  : ValueType<64 , 15>;   //  4 x i16 vector value
 def v2i32  : ValueType<64 , 16>;   //  2 x i32 vector value
-def v16i8  : ValueType<128, 17>;   // 16 x i8  vector value
-def v8i16  : ValueType<128, 18>;   //  8 x i16 vector value
-def v4i32  : ValueType<128, 19>;   //  4 x i32 vector value
-def v2i64  : ValueType<128, 20>;   //  2 x i64 vector value
-def v2f32  : ValueType<64,  21>;   //  2 x f32 vector value
-def v4f32  : ValueType<128, 22>;   //  4 x f32 vector value
-def v2f64  : ValueType<128, 23>;   //  2 x f64 vector value
+def v1i64  : ValueType<64 , 17>;   //  1 x i64 vector value
 
+def v16i8  : ValueType<128, 18>;   // 16 x i8  vector value
+def v8i16  : ValueType<128, 19>;   //  8 x i16 vector value
+def v3i32  : ValueType<96 , 20>;   //  3 x i32 vector value
+def v4i32  : ValueType<128, 21>;   //  4 x i32 vector value
+def v2i64  : ValueType<128, 22>;   //  2 x i64 vector value
+
+def v2f32  : ValueType<64,  23>;   //  2 x f32 vector value
+def v3f32  : ValueType<96 , 24>;   //  3 x f32 vector value
+def v4f32  : ValueType<128, 25>;   //  4 x f32 vector value
+def v2f64  : ValueType<128, 26>;   //  2 x f64 vector value
+
+// Pseudo valuetype mapped to the current pointer size to any address space.
+// Should only be used in TableGen.
+def iPTRAny   : ValueType<0, 252>;
+
+// Pseudo valuetype to represent "float of any format"
+def fAny   : ValueType<0  , 253>;
+
+// Pseudo valuetype to represent "integer of any bit width"
+def iAny   : ValueType<0  , 254>;
 
 // Pseudo valuetype mapped to the current pointer size.
 def iPTR   : ValueType<0  , 255>;