#ifndef LLVM_CODEGEN_VIRTREGMAP_H
#define LLVM_CODEGEN_VIRTREGMAP_H
+#include "llvm/ADT/IndexedMap.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/ADT/IndexedMap.h"
namespace llvm {
class MachineInstr;
/// createSpillSlot - Allocate a spill slot for RC from MFI.
unsigned createSpillSlot(const TargetRegisterClass *RC);
- VirtRegMap(const VirtRegMap&) LLVM_DELETED_FUNCTION;
- void operator=(const VirtRegMap&) LLVM_DELETED_FUNCTION;
+ VirtRegMap(const VirtRegMap&) = delete;
+ void operator=(const VirtRegMap&) = delete;
public:
static char ID;
VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
grow();
}
- /// @brief returns the register allocation preference.
- unsigned getRegAllocPref(unsigned virtReg);
-
/// @brief returns true if VirtReg is assigned to its preferred physreg.
- bool hasPreferredPhys(unsigned VirtReg) {
- return getPhys(VirtReg) == getRegAllocPref(VirtReg);
- }
+ bool hasPreferredPhys(unsigned VirtReg);
+
+ /// @brief returns true if VirtReg has a known preferred register.
+ /// This returns false if VirtReg has a preference that is a virtual
+ /// register that hasn't been assigned yet.
+ bool hasKnownPreference(unsigned VirtReg);
/// @brief records virtReg is a split live interval from SReg.
void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
/// the specified stack slot
void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
- void print(raw_ostream &OS, const Module* M = 0) const;
+ void print(raw_ostream &OS, const Module* M = nullptr) const override;
void dump() const;
};