Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
[oota-llvm.git] / include / llvm / IntrinsicsX86.td
index d9ea2b850bdef078b668e0d970d9eb2db2025a52..76db55ab294aac094103cd991a57a490b2a365ac 100644 (file)
@@ -65,45 +65,45 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_cmp_ss :
               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
-                         llvm_v4f32_ty, llvm_sbyte_ty], [IntrNoMem]>;
+                         llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_sse_cmp_ps :
               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
-                         llvm_v4f32_ty, llvm_sbyte_ty], [IntrNoMem]>;
+                         llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
                          llvm_v4f32_ty], [IntrNoMem]>;
 }
 
@@ -111,12 +111,12 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 // Conversion ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
-                         llvm_int_ty], [IntrNoMem]>;
+                         llvm_i32_ty], [IntrNoMem]>;
 }
 
 // SIMD load ops
@@ -152,7 +152,7 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 // Misc.
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
-              Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -208,45 +208,45 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse2_cmp_sd :
               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
-                         llvm_v2f64_ty, llvm_sbyte_ty], [IntrNoMem]>;
+                         llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_sse2_cmp_pd :
               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
-                         llvm_v2f64_ty, llvm_sbyte_ty], [IntrNoMem]>;
+                         llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
 }
 
@@ -324,7 +324,7 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
                          llvm_v4i32_ty], [IntrNoMem]>;
   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
-                         llvm_int_ty], [IntrNoMem]>;
+                         llvm_i32_ty], [IntrNoMem]>;
   def int_x86_sse2_psrl_w :
               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
                          llvm_v4i32_ty], [IntrNoMem]>;
@@ -336,7 +336,7 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
                          llvm_v4i32_ty], [IntrNoMem]>;
   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
-                         llvm_int_ty], [IntrNoMem]>;
+                         llvm_i32_ty], [IntrNoMem]>;
   def int_x86_sse2_psra_w :
               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
                          llvm_v4i32_ty], [IntrNoMem]>;
@@ -386,12 +386,12 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
-                         llvm_int_ty], [IntrNoMem]>;
+                         llvm_i32_ty], [IntrNoMem]>;
   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
@@ -431,7 +431,7 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
                          llvm_v2f64_ty], [IntrWriteMem]>;
   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
-                         llvm_int_ty], [IntrWriteMem]>;
+                         llvm_i32_ty], [IntrWriteMem]>;
 }
 
 // Misc.
@@ -445,13 +445,12 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
                          llvm_v8i16_ty], [IntrNoMem]>;
-  // FIXME: Temporary workaround since 2-wide shuffle is broken.
   def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">,
               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
-              Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
-              Intrinsic<[llvm_int_ty, llvm_v16i8_ty], [IntrNoMem]>;
+              Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
@@ -463,9 +462,48 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 }
 
+// Shuffles.
+// FIXME: Temporary workarounds since 2-wide shuffle is broken.
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_v2f64_ty], [IntrNoMem]>;
+  def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_ptr_ty], [IntrReadMem]>;
+  def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_ptr_ty], [IntrReadMem]>;
+  def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
+  def int_x86_sse2_unpckh_pd : GCCBuiltin<"__builtin_ia32_unpckhpd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_v2f64_ty], [IntrNoMem]>;
+  def int_x86_sse2_unpckl_pd : GCCBuiltin<"__builtin_ia32_unpcklpd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_v2f64_ty], [IntrNoMem]>;
+  def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
+              Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
+                         llvm_v2i64_ty], [IntrNoMem]>;
+  def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
+              Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
+                         llvm_v2i64_ty], [IntrNoMem]>;
+}
+
 //===----------------------------------------------------------------------===//
 // SSE3
 
+// Addition / subtraction ops.
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
+              Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
+                         llvm_v4f32_ty], [IntrNoMem]>;
+  def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
+              Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
+                         llvm_v2f64_ty], [IntrNoMem]>;
+}
+
 // Horizontal ops.
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
@@ -481,3 +519,45 @@ let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
                          llvm_v2f64_ty], [IntrNoMem]>;
 }
+
+// Specialized unaligned load.
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
+              Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
+}
+
+// Thread synchronization ops.
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
+              Intrinsic<[llvm_void_ty, llvm_ptr_ty,
+                         llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
+  def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
+              Intrinsic<[llvm_void_ty, llvm_i32_ty,
+                         llvm_i32_ty], [IntrWriteMem]>;
+}
+
+//===----------------------------------------------------------------------===//
+// MMX
+
+// Empty MMX state op.
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">,
+              Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
+}
+
+// Integer arithmetic ops.
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
+              Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
+                         llvm_v8i8_ty], [IntrNoMem]>;
+  def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
+              Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
+                         llvm_v4i16_ty], [IntrNoMem]>;
+
+  def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
+              Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
+                         llvm_v8i8_ty], [IntrNoMem]>;
+  def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
+              Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
+                         llvm_v4i16_ty], [IntrNoMem]>;
+}