Implement the StartChained and EndChained Win64 EH methods on MCStreamer.

[oota-llvm.git] / include / llvm / MC / MCInst.h

diff --git a/include/llvm/MC/MCInst.h b/include/llvm/MC/MCInst.h
index a6bd45b493b3419ba0eab055c654d2a3e2d5d5ab..d6ef7b4c33c1f0e03c59742e275dec8ac3af42db 100644 (file)
--- a/include/llvm/MC/MCInst.h
+++ b/include/llvm/MC/MCInst.h
@@ -17,12 +17,13 @@
 #define LLVM_MC_MCINST_H
 
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
 #include "llvm/Support/DataTypes.h"
-#include "llvm/Support/DebugLoc.h"
 
 namespace llvm {
 class raw_ostream;
 class MCAsmInfo;
+class MCInstPrinter;
 class MCExpr;
 
 /// MCOperand - Instances of this class represent operands of the MCInst class.
@@ -32,31 +33,27 @@ class MCOperand {
     kInvalid,                 ///< Uninitialized.
     kRegister,                ///< Register operand.
     kImmediate,               ///< Immediate operand.
-    kMBBLabel,                ///< Basic block label.
+    kFPImmediate,             ///< Floating-point immediate operand.
     kExpr                     ///< Relocatable immediate operand.
   };
   unsigned char Kind;
-  
+
   union {
     unsigned RegVal;
     int64_t ImmVal;
+    double FPImmVal;
     const MCExpr *ExprVal;
-    struct {
-      unsigned FunctionNo;
-      unsigned BlockNo;
-    } MBBLabel;
   };
 public:
-  
-  MCOperand() : Kind(kInvalid) {}
-  MCOperand(const MCOperand &RHS) { *this = RHS; }
+
+  MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
 
   bool isValid() const { return Kind != kInvalid; }
   bool isReg() const { return Kind == kRegister; }
   bool isImm() const { return Kind == kImmediate; }
-  bool isMBBLabel() const { return Kind == kMBBLabel; }
+  bool isFPImm() const { return Kind == kFPImmediate; }
   bool isExpr() const { return Kind == kExpr; }
-  
+
   /// getReg - Returns the register number.
   unsigned getReg() const {
     assert(isReg() && "This is not a register operand!");
@@ -68,7 +65,7 @@ public:
     assert(isReg() && "This is not a register operand!");
     RegVal = Reg;
   }
-  
+
   int64_t getImm() const {
     assert(isImm() && "This is not an immediate");
     return ImmVal;
@@ -77,14 +74,15 @@ public:
     assert(isImm() && "This is not an immediate");
     ImmVal = Val;
   }
-  
-  unsigned getMBBLabelFunction() const {
-    assert(isMBBLabel() && "This is not a machine basic block");
-    return MBBLabel.FunctionNo; 
+
+  double getFPImm() const {
+    assert(isFPImm() && "This is not an FP immediate");
+    return FPImmVal;
   }
-  unsigned getMBBLabelBlock() const {
-    assert(isMBBLabel() && "This is not a machine basic block");
-    return MBBLabel.BlockNo; 
+
+  void setFPImm(double Val) {
+    assert(isFPImm() && "This is not an FP immediate");
+    FPImmVal = Val;
   }
 
   const MCExpr *getExpr() const {
@@ -95,7 +93,7 @@ public:
     assert(isExpr() && "This is not an expression");
     ExprVal = Val;
   }
-  
+
   static MCOperand CreateReg(unsigned Reg) {
     MCOperand Op;
     Op.Kind = kRegister;
@@ -108,11 +106,10 @@ public:
     Op.ImmVal = Val;
     return Op;
   }
-  static MCOperand CreateMBBLabel(unsigned Fn, unsigned MBB) {
+  static MCOperand CreateFPImm(double Val) {
     MCOperand Op;
-    Op.Kind = kMBBLabel;
-    Op.MBBLabel.FunctionNo = Fn;
-    Op.MBBLabel.BlockNo = MBB;
+    Op.Kind = kFPImmediate;
+    Op.FPImmVal = Val;
     return Op;
   }
   static MCOperand CreateExpr(const MCExpr *Val) {
@@ -126,32 +123,47 @@ public:
   void dump() const;
 };
 
-  
+
 /// MCInst - Instances of this class represent a single low-level machine
-/// instruction. 
+/// instruction.
 class MCInst {
   unsigned Opcode;
   SmallVector<MCOperand, 8> Operands;
 public:
-  MCInst() : Opcode(~0U) {}
-  
+  MCInst() : Opcode(0) {}
+
   void setOpcode(unsigned Op) { Opcode = Op; }
-  
+
   unsigned getOpcode() const { return Opcode; }
-  DebugLoc getDebugLoc() const { return DebugLoc(); }
-  
+
   const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
   MCOperand &getOperand(unsigned i) { return Operands[i]; }
   unsigned getNumOperands() const { return Operands.size(); }
-  
+
   void addOperand(const MCOperand &Op) {
     Operands.push_back(Op);
   }
 
   void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
   void dump() const;
+
+  /// \brief Dump the MCInst as prettily as possible using the additional MC
+  /// structures, if given. Operators are separated by the \arg Separator
+  /// string.
+  void dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI = 0,
+                   const MCInstPrinter *Printer = 0,
+                   StringRef Separator = " ") const;
 };
 
+inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) {
+  MO.print(OS, 0);
+  return OS;
+}
+
+inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) {
+  MI.print(OS, 0);
+  return OS;
+}
 
 } // end namespace llvm