Supply a default 'operator=' method.

[oota-llvm.git] / include / llvm / MC / MCSubtargetInfo.h

diff --git a/include/llvm/MC/MCSubtargetInfo.h b/include/llvm/MC/MCSubtargetInfo.h
index d5e15d4842f42db181925a1f4f34f2fd9387adc5..69213cd77d9252dfa7d5b0b0ee8ed554ee33d6b9 100644 (file)
--- a/include/llvm/MC/MCSubtargetInfo.h
+++ b/include/llvm/MC/MCSubtargetInfo.h
@@ -68,9 +68,9 @@ public:
     return FeatureBits;
   }
 
-  /// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
-  /// feature string), recompute and return feature bits.
-  uint64_t ReInitMCSubtargetInfo(StringRef CPU, StringRef FS);
+  /// InitMCProcessorInfo - Set or change the CPU (optionally supplemented with
+  /// feature string). Recompute feature bits and scheduling model.
+  void InitMCProcessorInfo(StringRef CPU, StringRef FS);
 
   /// ToggleFeature - Toggle a feature and returns the re-computed feature
   /// bits. This version does not change the implied bits.
@@ -109,6 +109,9 @@ public:
 
   int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx,
                            unsigned WriteResID) const {
+    // TODO: The number of read advance entries in a class can be significant
+    // (~50). Consider compressing the WriteID into a dense ID of those that are
+    // used by ReadAdvance and representing them as a bitset.
     for (const MCReadAdvanceEntry *I = &ReadAdvanceTable[SC->ReadAdvanceIdx],
            *E = I + SC->NumReadAdvanceEntries; I != E; ++I) {
       if (I->UseIdx < UseIdx)