virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
SMLoc &EndLoc) = 0;
+ /// MapAndConstraints - Map inline assembly operands to MCInst operands
+ /// and an associated constraint.
+ typedef std::pair< unsigned, std::string > MapAndConstraint;
+ typedef SmallVector<MapAndConstraint, 4> MatchInstMapAndConstraints;
+ typedef SmallVectorImpl<MapAndConstraint> MatchInstMapAndConstraintsImpl;
+
/// ParseInstruction - Parse one assembly instruction.
///
/// The parser is positioned following the instruction name. The target
/// On failure, the target parser is responsible for emitting a diagnostic
/// explaining the match failure.
virtual bool
- MatchInstruction(SMLoc IDLoc, unsigned &Kind,
+ MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- SmallVectorImpl<MCInst> &MCInsts,
- unsigned &OrigErrorInfo,
- bool matchingInlineAsm = false) {
+ MCStreamer &Out, unsigned &Kind, unsigned &Opcode,
+ MatchInstMapAndConstraintsImpl &MapAndConstraints,
+ unsigned &OrigErrorInfo, bool matchingInlineAsm = false) {
OrigErrorInfo = ~0x0;
return true;
}
return Match_Success;
}
- virtual unsigned getMCInstOperandNum(unsigned Kind,
+ virtual void convertToMapAndConstraints(unsigned Kind,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- unsigned OperandNum,
- unsigned &NumMCOperands) = 0;
+ MatchInstMapAndConstraintsImpl &MapAndConstraints) = 0;
};
} // End llvm namespace