CSARM_V6 = 6,
CSARM_V5TEJ = 7,
CSARM_XSCALE = 8,
- CSARM_V7 = 9
+ CSARM_V7 = 9,
+ CSARM_V7F = 10,
+ CSARM_V7S = 11,
+ CSARM_V7K = 12
};
/// \brief PowerPC Machine Subtypes.
DysymtabLoadCommandSize = 80,
Nlist32Size = 12,
Nlist64Size = 16,
- RelocationInfoSize = 8
+ RelocationInfoSize = 8,
+ LinkeditLoadCommandSize = 16
};
/// \brief Constants for header magic field.
LCT_Symtab = 0x2,
LCT_Dysymtab = 0xb,
LCT_Segment64 = 0x19,
- LCT_UUID = 0x1b
+ LCT_UUID = 0x1b,
+ LCT_CodeSignature = 0x1d,
+ LCT_SegmentSplitInfo = 0x1e,
+ LCT_FunctionStarts = 0x26,
+ LCT_DataInCode = 0x29
};
/// \brief Load command structure.
uint32_t Type;
uint32_t Size;
- uint32_t LocalSymbolIndex;
+ uint32_t LocalSymbolsIndex;
uint32_t NumLocalSymbols;
uint32_t ExternalSymbolsIndex;
uint32_t NumLocalRelocationTableEntries;
};
+ struct LinkeditDataLoadCommand {
+ uint32_t Type;
+ uint32_t Size;
+ uint32_t DataOffset;
+ uint32_t DataSize;
+ };
+
/// @}
/// @name Section Data
/// @{
uint16_t Flags;
uint32_t Value;
};
+ // Despite containing a uint64_t, this structure is only 4-byte aligned within
+ // a MachO file.
+#pragma pack(push)
+#pragma pack(4)
struct Symbol64TableEntry {
uint32_t StringIndex;
uint8_t Type;
uint16_t Flags;
uint64_t Value;
};
+#pragma pack(pop)
+
+ /// @}
+ /// @name Data-in-code Table Entry
+ /// @{
+
+ // See <mach-o/loader.h>.
+ enum DataRegionType { Data = 1, JumpTable8, JumpTable16, JumpTable32 };
+ struct DataInCodeTableEntry {
+ uint32_t Offset; /* from mach_header to start of data region */
+ uint16_t Length; /* number of bytes in data region */
+ uint16_t Kind; /* a DataRegionType value */
+ };
/// @}
/// @name Indirect Symbol Table
RF_Scattered = 0x80000000
};
+ /// Common relocation info types.
enum RelocationInfoType {
RIT_Vanilla = 0,
RIT_Pair = 1,
- RIT_Difference = 2,
- RIT_PreboundLazyPointer = 3,
- RIT_LocalDifference = 4,
- RIT_TLV = 5
+ RIT_Difference = 2
+ };
+
+ /// Generic relocation info types, which are shared by some (but not all)
+ /// platforms.
+ enum RelocationInfoType_Generic {
+ RIT_Generic_PreboundLazyPointer = 3,
+ RIT_Generic_LocalDifference = 4,
+ RIT_Generic_TLV = 5
};
/// X86_64 uses its own relocation types.
enum RelocationInfoTypeX86_64 {
+ // Note that x86_64 doesn't even share the common relocation types.
RIT_X86_64_Unsigned = 0,
RIT_X86_64_Signed = 1,
RIT_X86_64_Branch = 2,
RIT_X86_64_TLV = 9
};
+ /// ARM uses its own relocation types.
+ enum RelocationInfoTypeARM {
+ RIT_ARM_LocalDifference = 3,
+ RIT_ARM_PreboundLazyPointer = 4,
+ RIT_ARM_Branch24Bit = 5,
+ RIT_ARM_ThumbBranch22Bit = 6,
+ RIT_ARM_ThumbBranch32Bit = 7,
+ RIT_ARM_Half = 8,
+ RIT_ARM_HalfDifference = 9
+
+ };
+
} // end namespace macho
} // end namespace object