Add interfaces to lower varargs and return/frame address intrinsics.

[oota-llvm.git] / include / llvm / Target / MRegisterInfo.h

diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h
index a28f2c31890848c6d7bf99228ee29f47a9ab71ca..c3cc76888a5cd955f07c729df5b45bf26792680c 100644 (file)
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/MRegisterInfo.h
@@ -33,10 +33,10 @@ class MachineInstr;
 /// Registers that this does not apply to simply should set this to null.
 ///
 struct MRegisterDesc {
-  const char     *Name;       // Assembly language name for the register
-  const unsigned *AliasSet;   // Register Alias Set, described above
-  unsigned        Flags;      // Flags identifying register properties (below)
-  unsigned        TSFlags;    // Target Specific Flags
+  const char     *Name;         // Assembly language name for the register
+  const unsigned *AliasSet;     // Register Alias Set, described above
+  unsigned char SpillSize;      // Size of this register in bytes
+  unsigned char SpillAlignment; // Alignment of stack slot for this reg
 };
 
 class TargetRegisterClass {
@@ -119,7 +119,6 @@ private:
 
   regclass_iterator RegClassBegin, RegClassEnd;   // List of regclasses
 
-  const TargetRegisterClass **PhysRegClasses; // Reg class for each register
   int CallFrameSetupOpcode, CallFrameDestroyOpcode;
 protected:
   MRegisterInfo(const MRegisterDesc *D, unsigned NR,
@@ -160,6 +159,10 @@ public:
     return Reg >= FirstVirtualRegister;
   }
 
+  /// getAllocatableSet - Returns a bitset indexed by register number
+  /// indicating if a register is allocatable or not.
+  std::vector<bool> getAllocatableSet(MachineFunction &MF) const;
+
   const MRegisterDesc &operator[](unsigned RegNo) const {
     assert(RegNo < NumRegs &&
            "Attempting to access record for invalid register number!");
@@ -171,15 +174,6 @@ public:
   ///
   const MRegisterDesc &get(unsigned RegNo) const { return operator[](RegNo); }
 
-  /// getRegClass - Return the register class for the specified physical
-  /// register.
-  ///
-  const TargetRegisterClass *getRegClass(unsigned RegNo) const {
-    assert(RegNo < NumRegs && "Register number out of range!");
-    assert(PhysRegClasses[RegNo] && "Register is not in a class!");
-    return PhysRegClasses[RegNo];
-  }
-
   /// getAliasSet - Return the set of registers aliased by the specified
   /// register, or a null list of there are none.  The list returned is zero
   /// terminated.
@@ -194,6 +188,18 @@ public:
     return get(RegNo).Name;
   }
 
+  /// getSpillSize - Return the size in bits required of a stack slot used to
+  /// spill register into.
+  unsigned getSpillSize(unsigned RegNo) const {
+    return get(RegNo).SpillSize;
+  }
+
+  /// getSpillAlignment - Return the alignment required by a stack slot used to
+  /// spill register into.
+  unsigned getSpillAlignment(unsigned RegNo) const {
+    return get(RegNo).SpillAlignment;
+  }
+
   /// getNumRegs - Return the number of registers this target has
   /// (useful for sizing arrays holding per register information)
   unsigned getNumRegs() const {