Switch most getReservedRegs() clients to the MRI equivalent.

[oota-llvm.git] / include / llvm / Target / TargetCallingConv.h

diff --git a/include/llvm/Target/TargetCallingConv.h b/include/llvm/Target/TargetCallingConv.h
index 0c7147e729ba90a416f9dfe21947d50b3c338a17..8030d38d73829ad3b1ab8b54218b495c98804c1c 100644 (file)
--- a/include/llvm/Target/TargetCallingConv.h
+++ b/include/llvm/Target/TargetCallingConv.h
@@ -14,7 +14,9 @@
 #ifndef LLVM_TARGET_TARGETCALLINGCONV_H
 #define LLVM_TARGET_TARGETCALLINGCONV_H
 
-#include "llvm/CodeGen/SelectionDAGNodes.h"
+#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/MathExtras.h"
+#include <string>
 
 namespace llvm {
 
@@ -34,16 +36,16 @@ namespace ISD {
     static const uint64_t ByValOffs      = 4;
     static const uint64_t Nest           = 1ULL<<5;  ///< Nested fn static chain
     static const uint64_t NestOffs       = 5;
-    static const uint64_t ByValAlign     = 0xFULL << 6; //< Struct alignment
+    static const uint64_t ByValAlign     = 0xFULL << 6; ///< Struct alignment
     static const uint64_t ByValAlignOffs = 6;
     static const uint64_t Split          = 1ULL << 10;
     static const uint64_t SplitOffs      = 10;
     static const uint64_t OrigAlign      = 0x1FULL<<27;
     static const uint64_t OrigAlignOffs  = 27;
-    static const uint64_t ByValSize      = 0xffffffffULL << 32; //< Struct size
+    static const uint64_t ByValSize      = 0xffffffffULL << 32; ///< Struct size
     static const uint64_t ByValSizeOffs  = 32;
 
-    static const uint64_t One            = 1ULL; //< 1 of this type, for shifts
+    static const uint64_t One            = 1ULL; ///< 1 of this type, for shifts
 
     uint64_t Flags;
   public:
@@ -108,14 +110,22 @@ namespace ISD {
   ///
   struct InputArg {
     ArgFlagsTy Flags;
-    EVT VT;
+    MVT VT;
     bool Used;
 
+    /// Index original Function's argument.
+    unsigned OrigArgIndex;
+
+    /// Offset in bytes of current input value relative to the beginning of
+    /// original argument. E.g. if argument was splitted into four 32 bit
+    /// registers, we got 4 InputArgs with PartOffsets 0, 4, 8 and 12.
+    unsigned PartOffset;
+
     InputArg() : VT(MVT::Other), Used(false) {}
-    InputArg(ISD::ArgFlagsTy flags, EVT vt, bool used)
-      : Flags(flags), VT(vt), Used(used) {
-      assert(VT.isSimple() &&
-             "InputArg value type must be Simple!");
+    InputArg(ArgFlagsTy flags, EVT vt, bool used,
+             unsigned origIdx, unsigned partOffs)
+      : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
+      VT = vt.getSimpleVT();
     }
   };
 
@@ -125,35 +135,17 @@ namespace ISD {
   ///
   struct OutputArg {
     ArgFlagsTy Flags;
-    SDValue Val;
+    MVT VT;
 
     /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
     bool IsFixed;
 
     OutputArg() : IsFixed(false) {}
-    OutputArg(ISD::ArgFlagsTy flags, SDValue val, bool isfixed)
-      : Flags(flags), Val(val), IsFixed(isfixed) {
-      assert(Val.getValueType().isSimple() &&
-             "OutputArg value type must be Simple!");
+    OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed)
+      : Flags(flags), IsFixed(isfixed) {
+      VT = vt.getSimpleVT();
     }
   };
-
-  /// OutputArgReg - This struct carries flags and a register value for a
-  /// single outgoing (actual) argument or outgoing (from the perspective
-  /// of the caller) return value virtual register.
-  ///
-  struct OutputArgReg {
-    ArgFlagsTy Flags;
-    EVT VT;
-    unsigned Reg;
-
-    /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
-    bool IsFixed;
-
-    OutputArgReg() : IsFixed(false) {}
-    OutputArgReg(ISD::ArgFlagsTy flags, EVT vt, unsigned reg, bool isfixed)
-      : Flags(flags), VT(vt), Reg(reg), IsFixed(isfixed) {}
-  };
 }
 
 } // end llvm namespace