/// the destination along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than loading from the stack slot.
- virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{
+ virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const {
return 0;
}
/// the source reg along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than storing to the stack slot.
- virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
+ virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const {
return 0;
}
/// from the argument area of a function if it does not change. This should
/// only return true of *all* loads the instruction does are invariant (if it
/// does multiple loads).
- virtual bool isInvariantLoad(MachineInstr *MI) const {
+ virtual bool isInvariantLoad(const MachineInstr *MI) const {
return false;
}
}
/// RemoveBranch - Remove the branching code at the end of the specific MBB.
- /// this is only invoked in cases where AnalyzeBranch returns success. It
+ /// This is only invoked in cases where AnalyzeBranch returns success. It
/// returns the number of instructions that were removed.
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const {
assert(0 && "Target didn't implement TargetInstrInfo::RemoveBranch!");
return 0;
}
- /// copyRegToReg - Add a copy between a pair of registers
+ /// copyRegToReg - Emit instructions to copy between a pair of registers. It
+ /// returns false if the target does not how to copy between the specified
+ /// registers.
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
const TargetRegisterClass *SrcRC) const {
assert(0 && "Target didn't implement TargetInstrInfo::copyRegToReg!");
+ return false;
}
+ /// storeRegToStackSlot - Store the specified register of the given register
+ /// class to the specified stack frame index. The store instruction is to be
+ /// added to the given machine basic block before the specified machine
+ /// instruction. If isKill is true, the register operand is the last use and
+ /// must be marked kill.
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill, int FrameIndex,
assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!");
}
+ /// storeRegToAddr - Store the specified register of the given register class
+ /// to the specified address. The store instruction is to be added to the
+ /// given machine basic block before the specified machine instruction. If
+ /// isKill is true, the register operand is the last use and must be marked
+ /// kill.
virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
assert(0 && "Target didn't implement TargetInstrInfo::storeRegToAddr!");
}
+ /// loadRegFromStackSlot - Load the specified register of the given register
+ /// class from the specified stack frame index. The load instruction is to be
+ /// added to the given machine basic block before the specified machine
+ /// instruction.
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIndex,
assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!");
}
+ /// loadRegFromAddr - Load the specified register of the given register class
+ /// class from the specified address. The load instruction is to be added to
+ /// the given machine basic block before the specified machine instruction.
virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
/// stream.
virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
MachineInstr* MI,
- SmallVectorImpl<unsigned> &Ops,
+ const SmallVectorImpl<unsigned> &Ops,
int FrameIndex) const {
return 0;
}
/// stack slot.
virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
MachineInstr* MI,
- SmallVectorImpl<unsigned> &Ops,
+ const SmallVectorImpl<unsigned> &Ops,
MachineInstr* LoadMI) const {
return 0;
}
/// canFoldMemoryOperand - Returns true if the specified load / store is
/// folding is possible.
virtual
- bool canFoldMemoryOperand(MachineInstr *MI,
- SmallVectorImpl<unsigned> &Ops) const{
+ bool canFoldMemoryOperand(const MachineInstr *MI,
+ const SmallVectorImpl<unsigned> &Ops) const {
return false;
}
/// fall-through into its successor block. This is primarily used when a
/// branch is unanalyzable. It is useful for things like unconditional
/// indirect branches (jump tables).
- virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const {
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
return false;
}
return false;
}
+ /// IgnoreRegisterClassBarriers - Returns true if pre-register allocation
+ /// live interval splitting pass should ignore barriers of the specified
+ /// register class.
+ virtual bool IgnoreRegisterClassBarriers(const TargetRegisterClass *RC) const{
+ return true;
+ }
+
/// getPointerRegClass - Returns a TargetRegisterClass used for pointer
/// values.
virtual const TargetRegisterClass *getPointerRegClass() const {
/// GetFunctionSizeInBytes - Returns the size of the specified MachineFunction.
///
virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const = 0;
-
};
/// TargetInstrInfoImpl - This is the default implementation of