-//===-- llvm/Target/TargetMachine.h - General Target Information -*- C++ -*-==//
+//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This file describes the general parts of a Target machine.
//
#define LLVM_TARGET_TARGETMACHINE_H
#include "llvm/Target/TargetData.h"
-#include "Support/NonCopyable.h"
+#include <cassert>
-class MachineInstrInfo;
-class MachineInstrDescriptor;
-class MachineSchedInfo;
-class MachineRegInfo;
+namespace llvm {
+
+class TargetInstrInfo;
+class TargetInstrDescriptor;
+class TargetJITInfo;
+class TargetSchedInfo;
+class SparcV9RegInfo;
class TargetFrameInfo;
-class TargetCacheInfo;
-class TargetOptInfo;
class MachineCodeEmitter;
class MRegisterInfo;
+class FunctionPassManager;
class PassManager;
class Pass;
+class IntrinsicLowering;
//===----------------------------------------------------------------------===//
///
/// the target machine. All target-specific information should be accessible
/// through this interface.
///
-class TargetMachine : public NonCopyableV {
+class TargetMachine {
const std::string Name;
- const TargetData DataLayout; // Calculates type size & alignment
+ const TargetData DataLayout; // Calculates type size & alignment
+ IntrinsicLowering *IL; // Specifies how to lower intrinsic calls
-protected:
- TargetMachine(const std::string &name, // Can only create subclasses...
- bool LittleEndian = false,
- unsigned char SubWordSize = 1, unsigned char IntRegSize = 8,
- unsigned char PtrSize = 8, unsigned char PtrAl = 8,
- unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
- unsigned char LongAl = 8, unsigned char IntAl = 4,
- unsigned char ShortAl = 2, unsigned char ByteAl = 1)
- : Name(name), DataLayout(name, LittleEndian, SubWordSize, IntRegSize,
- PtrSize, PtrAl, DoubleAl, FloatAl, LongAl,
- IntAl, ShortAl, ByteAl) {}
+ TargetMachine(const TargetMachine&); // DO NOT IMPLEMENT
+ void operator=(const TargetMachine&); // DO NOT IMPLEMENT
+protected: // Can only create subclasses...
+ TargetMachine(const std::string &name, IntrinsicLowering *IL,
+ bool LittleEndian = false,
+ unsigned char PtrSize = 8, unsigned char PtrAl = 8,
+ unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
+ unsigned char LongAl = 8, unsigned char IntAl = 4,
+ unsigned char ShortAl = 2, unsigned char ByteAl = 1,
+ unsigned char BoolAl = 1);
+
+ TargetMachine(const std::string &name, IntrinsicLowering *IL,
+ const TargetData &TD);
+
+ /// This constructor is used for targets that support arbitrary TargetData
+ /// layouts, like the C backend. It initializes the TargetData to match that
+ /// of the specified module.
+ ///
+ TargetMachine(const std::string &name, IntrinsicLowering *IL,
+ const Module &M);
public:
- virtual ~TargetMachine() {}
+ virtual ~TargetMachine();
+
+ /// getModuleMatchQuality - This static method should be implemented by
+ /// targets to indicate how closely they match the specified module. This is
+ /// used by the LLC tool to determine which target to use when an explicit
+ /// -march option is not specified. If a target returns zero, it will never
+ /// be chosen without an explicit -march option.
+ static unsigned getModuleMatchQuality(const Module &M) { return 0; }
+
+ /// getJITMatchQuality - This static method should be implemented by targets
+ /// that provide JIT capabilities to indicate how suitable they are for
+ /// execution on the current host. If a value of 0 is returned, the target
+ /// will not be used unless an explicit -march option is used.
+ static unsigned getJITMatchQuality() { return 0; }
+
const std::string &getName() const { return Name; }
+
+ /// getIntrinsicLowering - This method returns a reference to an
+ /// IntrinsicLowering instance which should be used by the code generator to
+ /// lower unknown intrinsic functions to the equivalent LLVM expansion.
+ ///
+ IntrinsicLowering &getIntrinsicLowering() const { return *IL; }
// Interfaces to the major aspects of target machine information:
// -- Instruction opcode and operand information
// -- Pipelines and scheduling information
- // -- Register information
// -- Stack frame information
- // -- Cache hierarchy information
- // -- Machine-level optimization information (peephole only)
//
- virtual const MachineInstrInfo& getInstrInfo() const = 0;
- virtual const MachineSchedInfo& getSchedInfo() const = 0;
- virtual const MachineRegInfo& getRegInfo() const = 0;
- virtual const TargetFrameInfo& getFrameInfo() const = 0;
- virtual const TargetCacheInfo& getCacheInfo() const = 0;
- virtual const TargetOptInfo& getOptInfo() const = 0;
+ virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
+ virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
const TargetData &getTargetData() const { return DataLayout; }
/// getRegisterInfo - If register information is available, return it. If
///
virtual const MRegisterInfo* getRegisterInfo() const { return 0; }
- // Data storage information
- //
- virtual unsigned findOptimalStorageSize(const Type* ty) const;
-
- /// addPassesToJITCompile - Add passes to the specified pass manager to
- /// implement a fast dynamic compiler for this target. Return true if this is
- /// not supported for this target.
+ /// getJITInfo - If this target supports a JIT, return information for it,
+ /// otherwise return null.
///
- virtual bool addPassesToJITCompile(PassManager &PM) { return true; }
+ virtual TargetJITInfo *getJITInfo() { return 0; }
+
+ // These are deprecated interfaces.
+ virtual const TargetSchedInfo *getSchedInfo() const { return 0; }
+ virtual const SparcV9RegInfo *getRegInfo() const { return 0; }
/// addPassesToEmitAssembly - Add passes to the specified pass manager to get
/// assembly langage code emitted. Typically this will involve several steps
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MAchineCodeEmitter object to handle
+ /// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method should returns true if machine code emission is
/// not supported.
///
- virtual bool addPassesToEmitMachineCode(PassManager &PM,
+ virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
MachineCodeEmitter &MCE) {
return true;
}
};
+} // End llvm namespace
+
#endif
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