Change the way unused regs. are marked and found to consider regType

[oota-llvm.git] / include / llvm / Target / TargetMachineImpls.h

diff --git a/include/llvm/Target/TargetMachineImpls.h b/include/llvm/Target/TargetMachineImpls.h
index 83bebbddaf351a945fdbc697a5ffcc8acb51e62a..5e10c5c951ca06311078273ca20a467ef5b851cb 100644 (file)
--- a/include/llvm/Target/TargetMachineImpls.h
+++ b/include/llvm/Target/TargetMachineImpls.h
@@ -1,17 +1,39 @@
-//===-- llvm/CodeGen/Sparc.h - Sparc Target Description ----------*- C++ -*--=//
+//===-- llvm/Target/TargetMachineImpls.h - Target Descriptions --*- C++ -*-===//
 //
-// This file defines the Sparc processor targets
+// This file defines the entry point to getting access to the various target
+// machine implementations available to LLVM.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_CODEGEN_SPARC_H
-#define LLVM_CODEGEN_SPARC_H
+#ifndef LLVM_TARGET_TARGETMACHINEIMPLS_H
+#define LLVM_TARGET_TARGETMACHINEIMPLS_H
+
+namespace TM {
+  enum {
+    PtrSizeMask  = 1,
+    PtrSize32    = 0,
+    PtrSize64    = 1,
+
+    EndianMask   = 2,
+    LittleEndian = 0,
+    BigEndian    = 2,
+  };
+}
 
 class TargetMachine;
 
 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
 // that implements the Sparc backend.
 //
-TargetMachine *allocateSparcTargetMachine();
+TargetMachine *allocateSparcTargetMachine(unsigned Configuration =
+                                          TM::PtrSize64|TM::BigEndian);
+
+// allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
+// that implements the X86 backend.  The X86 target machine can run in
+// "emulation" mode, where it is capable of emulating machines of larger pointer
+// size and different endianness if desired.
+//
+TargetMachine *allocateX86TargetMachine(unsigned Configuration =
+                                        TM::PtrSize32|TM::LittleEndian);
 
 #endif