-//===-- llvm/Target/RegInfo.h - Target Register Information ------*- C++ -*-==//
+//===-- llvm/Target/TargetRegInfo.h - Target Register Info ------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This file is used to describe the register system of a target to the
// register allocator.
//
//===----------------------------------------------------------------------===//
-#ifndef LLVM_TARGET_MACHINEREGINFO_H
-#define LLVM_TARGET_MACHINEREGINFO_H
+#ifndef LLVM_TARGET_TARGETREGINFO_H
+#define LLVM_TARGET_TARGETREGINFO_H
-#include "llvm/Support/NonCopyable.h"
-#include <hash_map>
+#include "Support/hash_map"
#include <string>
+#include <cassert>
+namespace llvm {
+
+class TargetMachine;
class IGNode;
+class Type;
class Value;
class LiveRangeInfo;
-class Method;
-class Instruction;
+class Function;
class LiveRange;
class AddedInstrns;
class MachineInstr;
-class RegClass;
-class CallInst;
-class ReturnInst;
-
-
-//-----------------------------------------------------------------------------
-// class MachineRegClassInfo
-//
-// Purpose:
-// Interface to description of machine register class (e.g., int reg class
-// float reg class etc)
-//
-//--------------------------------------------------------------------------
-
-
-class MachineRegClassInfo {
+class BasicBlock;
+///----------------------------------------------------------------------------
+/// Interface to description of machine register class (e.g., int reg class
+/// float reg class etc)
+///
+class TargetRegClassInfo {
protected:
-
const unsigned RegClassID; // integer ID of a reg class
const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
public:
-
inline unsigned getRegClassID() const { return RegClassID; }
inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
+ // This method marks the registers used for a given register number.
+ // This defaults to marking a single register but may mark multiple
+ // registers when a single number denotes paired registers.
+ //
+ virtual void markColorsUsed(unsigned RegInClass,
+ int UserRegType,
+ int RegTypeWanted,
+ std::vector<bool> &IsColorUsedArr) const {
+ assert(RegInClass < NumOfAllRegs && RegInClass < IsColorUsedArr.size());
+ assert(UserRegType == RegTypeWanted &&
+ "Default method is probably incorrect for class with multiple types.");
+ IsColorUsedArr[RegInClass] = true;
+ }
+ // This method finds unused registers of the specified register type,
+ // using the given "used" flag array IsColorUsedArr. It defaults to
+ // checking a single entry in the array directly, but that can be overridden
+ // for paired registers and other such silliness.
+ // It returns -1 if no unused color is found.
+ //
+ virtual int findUnusedColor(int RegTypeWanted,
+ const std::vector<bool> &IsColorUsedArr) const {
+ // find first unused color in the IsColorUsedArr directly
+ unsigned NC = this->getNumOfAvailRegs();
+ assert(IsColorUsedArr.size() >= NC && "Invalid colors-used array");
+ for (unsigned c = 0; c < NC; c++)
+ if (!IsColorUsedArr[c])
+ return c;
+ return -1;
+ }
// This method should find a color which is not used by neighbors
// (i.e., a false position in IsColorUsedArr) and
- virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
+ virtual void colorIGNode(IGNode *Node,
+ const std::vector<bool> &IsColorUsedArr) const = 0;
+ // Check whether a specific register is volatile, i.e., whether it is not
+ // preserved across calls
+ virtual bool isRegVolatile(int Reg) const = 0;
- MachineRegClassInfo(const unsigned ID, const unsigned NVR,
- const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
- NumOfAllRegs(NAR)
- { } // empty constructor
+ // Check whether a specific register is modified as a side-effect of the
+ // call instruction itself,
+ virtual bool modifiedByCall(int Reg) const {return false; }
+ virtual const char* const getRegName(unsigned reg) const = 0;
+
+ TargetRegClassInfo(unsigned ID, unsigned NVR, unsigned NAR)
+ : RegClassID(ID), NumOfAvailRegs(NVR), NumOfAllRegs(NAR) {}
};
//---------------------------------------------------------------------------
-// class MachineRegInfo
-//
-// Purpose:
-// Interface to register info of target machine
-//
-//--------------------------------------------------------------------------
-
-
-
-typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
-
-// A vector of all machine register classes
-typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
-
-
-class MachineRegInfo : public NonCopyableV {
-
+/// TargetRegInfo - Interface to register info of target machine
+///
+class TargetRegInfo {
+ TargetRegInfo(const TargetRegInfo &); // DO NOT IMPLEMENT
+ void operator=(const TargetRegInfo &); // DO NOT IMPLEMENT
protected:
-
- MachineRegClassArrayType MachineRegClassArr;
-
+ // A vector of all machine register classes
+ //
+ std::vector<const TargetRegClassInfo *> MachineRegClassArr;
public:
+ const TargetMachine ⌖
+
+ // A register can be initialized to an invalid number. That number can
+ // be obtained using this method.
+ //
+ static int getInvalidRegNum() { return -1; }
+ TargetRegInfo(const TargetMachine& tgt) : target(tgt) { }
+ virtual ~TargetRegInfo() {
+ for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
+ delete MachineRegClassArr[i];
+ }
// According the definition of a MachineOperand class, a Value in a
// machine instruction can go into either a normal register or a
// condition code register. If isCCReg is true below, the ID of the condition
- // code regiter class will be returned. Otherwise, the normal register
+ // code register class will be returned. Otherwise, the normal register
// class (eg. int, float) must be returned.
- virtual unsigned getRegClassIDOfValue (const Value *const Val,
- bool isCCReg = false) const =0;
-
+ virtual unsigned getRegClassIDOfType (const Type *type,
+ bool isCCReg = false) const = 0;
+ virtual unsigned getRegClassIDOfRegType(int regType) const = 0;
+
+ unsigned getRegClassIDOfReg(int unifiedRegNum) const {
+ unsigned classId = 0;
+ (void) getClassRegNum(unifiedRegNum, classId);
+ return classId;
+ }
- inline unsigned int getNumOfRegClasses() const {
+ unsigned int getNumOfRegClasses() const {
return MachineRegClassArr.size();
}
- const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
+ const TargetRegClassInfo *getMachineRegClass(unsigned i) const {
return MachineRegClassArr[i];
}
// returns the register that is hardwired to zero if any (-1 if none)
- virtual inline int getZeroRegNum() const = 0;
-
- //virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
- // this method must give the exact register class of a machine operand
- // e.g, Int, Float, Int CC, Float CC
- //virtual unsigned getRCIDOfMachineOp (const MachineOperand &MO) const = 0;
-
-
- virtual void suggestRegs4MethodArgs(const Method *const Meth,
- LiveRangeInfo & LRI) const = 0;
-
- virtual void suggestRegs4CallArgs(const MachineInstr *const CallI,
- LiveRangeInfo& LRI, vector<RegClass *> RCL) const = 0;
-
- virtual void suggestReg4RetValue(const MachineInstr *const RetI,
+ //
+ virtual unsigned getZeroRegNum() const = 0;
+
+ // Number of registers used for passing int args (usually 6: %o0 - %o5)
+ // and float args (usually 32: %f0 - %f31)
+ //
+ virtual unsigned const getNumOfIntArgRegs() const = 0;
+ virtual unsigned const getNumOfFloatArgRegs() const = 0;
+
+ // The following methods are used to color special live ranges (e.g.
+ // method args and return values etc.) with specific hardware registers
+ // as required. See SparcRegInfo.cpp for the implementation for Sparc.
+ //
+ virtual void suggestRegs4MethodArgs(const Function *Func,
+ LiveRangeInfo& LRI) const = 0;
+
+ virtual void suggestRegs4CallArgs(MachineInstr *CallI,
+ LiveRangeInfo& LRI) const = 0;
+
+ virtual void suggestReg4RetValue(MachineInstr *RetI,
LiveRangeInfo& LRI) const = 0;
- virtual void colorMethodArgs(const Method *const Meth, LiveRangeInfo& LRI,
- AddedInstrns *const FirstAI) const = 0;
-
- virtual void colorCallArgs(const MachineInstr *const CalI,
- LiveRangeInfo& LRI,
- AddedInstrns *const CallAI) const = 0;
-
- virtual void colorRetValue(const MachineInstr *const RetI,LiveRangeInfo& LRI,
- AddedInstrns *const RetAI) const = 0;
+ virtual void colorMethodArgs(const Function *Func,
+ LiveRangeInfo &LRI,
+ std::vector<MachineInstr*>& InstrnsBefore,
+ std::vector<MachineInstr*>& InstrnsAfter) const = 0;
+
+ // The following methods are used to generate "copy" machine instructions
+ // for an architecture. Currently they are used in TargetRegClass
+ // interface. However, they can be moved to TargetInstrInfo interface if
+ // necessary.
+ //
+ // The function regTypeNeedsScratchReg() can be used to check whether a
+ // scratch register is needed to copy a register of type `regType' to
+ // or from memory. If so, such a scratch register can be provided by
+ // the caller (e.g., if it knows which regsiters are free); otherwise
+ // an arbitrary one will be chosen and spilled by the copy instructions.
+ // If a scratch reg is needed, the reg. type that must be used
+ // for scratch registers is returned in scratchRegType.
+ //
+ virtual bool regTypeNeedsScratchReg(int RegType,
+ int& scratchRegType) const = 0;
+
+ virtual void cpReg2RegMI(std::vector<MachineInstr*>& mvec,
+ unsigned SrcReg, unsigned DestReg,
+ int RegType) const = 0;
+
+ virtual void cpReg2MemMI(std::vector<MachineInstr*>& mvec,
+ unsigned SrcReg, unsigned DestPtrReg, int Offset,
+ int RegType, int scratchReg = -1) const=0;
+ virtual void cpMem2RegMI(std::vector<MachineInstr*>& mvec,
+ unsigned SrcPtrReg, int Offset, unsigned DestReg,
+ int RegType, int scratchReg = -1) const=0;
+
+ virtual void cpValue2Value(Value *Src, Value *Dest,
+ std::vector<MachineInstr*>& mvec) const = 0;
+ // Check whether a specific register is volatile, i.e., whether it is not
+ // preserved across calls
+ inline virtual bool isRegVolatile(int RegClassID, int Reg) const {
+ return MachineRegClassArr[RegClassID]->isRegVolatile(Reg);
+ }
- //virtual bool handleSpecialMInstr(const MachineInstr * MInst,
- // LiveRangeInfo& LRI, vector<RegClass *> RCL) const = 0;
-
- // returns the reg used for pushing the address when a method is called.
+ // Check whether a specific register is modified as a side-effect of the
+ // call instruction itself,
+ inline virtual bool modifiedByCall(int RegClassID, int Reg) const {
+ return MachineRegClassArr[RegClassID]->modifiedByCall(Reg);
+ }
+
+ // Returns the reg used for pushing the address when a method is called.
// This can be used for other purposes between calls
+ //
virtual unsigned getCallAddressReg() const = 0;
- // and when we return from a method. It should be made sure that this
+ // Returns the register containing the return address.
+ //It should be made sure that this
// register contains the return value when a return instruction is reached.
+ //
virtual unsigned getReturnAddressReg() const = 0;
- virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
-
- virtual const string getUnifiedRegName(int UnifiedRegNum) const = 0;
-
- //virtual void printReg(const LiveRange *const LR) const =0;
-
- MachineRegInfo() { }
-
-};
-
-
-
-
-#endif
-
-
-
-#if 0
-
-//---------------------------------------------------------------------------
-// class MachineRegInfo
-//
-// Purpose:
-// Interface to register info of target machine
-//
-//--------------------------------------------------------------------------
-
-
-
-typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
-
-// A vector of all machine register classes
-typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
-
-
-class MachineRegInfo : public NonCopyableV {
-
-protected:
-
- MachineRegClassArrayType MachineRegClassArr;
-
-
-public:
-
- MachineRegInfo() {}
-
- // According the definition of a MachineOperand class, a Value in a
- // machine instruction can go into either a normal register or a
- // condition code register. If isCCReg is true below, the ID of the condition
- // code regiter class will be returned. Otherwise, the normal register
- // class (eg. int, float) must be returned.
- virtual unsigned getRegClassIDOfValue (const Value *const Val,
- bool isCCReg = false) const =0;
+ // Each register class has a separate space for register IDs. To convert
+ // a regId in a register class to a common Id, or vice versa,
+ // we use the folloing two methods.
+ //
+ // This method converts from class reg. number to unified register number.
+ int getUnifiedRegNum(unsigned regClassID, int reg) const {
+ if (reg == getInvalidRegNum()) { return getInvalidRegNum(); }
+ assert(regClassID < getNumOfRegClasses() && "Invalid register class");
+ int totalRegs = 0;
+ for (unsigned rcid = 0; rcid < regClassID; ++rcid)
+ totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs();
+ return reg + totalRegs;
+ }
- // returns the register that is hardwired to zero if any (-1 if none)
- virtual inline int getZeroRegNum() const = 0;
+ // This method converts the unified number to the number in its class,
+ // and returns the class ID in regClassID.
+ int getClassRegNum(int uRegNum, unsigned& regClassID) const {
+ if (uRegNum == getInvalidRegNum()) { return getInvalidRegNum(); }
+
+ int totalRegs = 0, rcid = 0, NC = getNumOfRegClasses();
+ while (rcid < NC &&
+ uRegNum>= totalRegs+(int)MachineRegClassArr[rcid]->getNumOfAllRegs())
+ {
+ totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs();
+ rcid++;
+ }
+ if (rcid == NC) {
+ assert(0 && "getClassRegNum(): Invalid register number");
+ return getInvalidRegNum();
+ }
+ regClassID = rcid;
+ return uRegNum - totalRegs;
+ }
- inline unsigned int getNumOfRegClasses() const {
- return MachineRegClassArr.size();
- }
-
- const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
- return MachineRegClassArr[i];
+ // Returns the assembly-language name of the specified machine register.
+ //
+ const char * const getUnifiedRegName(int UnifiedRegNum) const {
+ unsigned regClassID = getNumOfRegClasses(); // initialize to invalid value
+ int regNumInClass = getClassRegNum(UnifiedRegNum, regClassID);
+ return MachineRegClassArr[regClassID]->getRegName(regNumInClass);
}
-
-
- //virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
- // this method must give the exact register class of a machine operand
- // e.g, Int, Float, Int CC, Float CC
- //virtual unsigned getRCIDOfMachineOp (const MachineOperand &MO) const = 0;
-
-
- virtual void colorArgs(const Method *const Meth,
- LiveRangeInfo & LRI) const = 0;
-
- virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
- LiveRangeInfo& LRI,
- AddedInstrMapType& AddedInstrMap ) const = 0 ;
-
- virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
-
- virtual const string getUnifiedRegName(int UnifiedRegNum) const = 0;
-
- //virtual void printReg(const LiveRange *const LR) const =0;
+ // Get the register type for a register identified different ways.
+ // Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())!
+ // The reg class of a LR depends both on the Value types in it and whether
+ // they are CC registers or not (for example).
+ virtual int getRegTypeForDataType(const Type* type) const = 0;
+ virtual int getRegTypeForLR(const LiveRange *LR) const = 0;
+ virtual int getRegType(int unifiedRegNum) const = 0;
+
+ // The following methods are used to get the frame/stack pointers
+ //
+ virtual unsigned getFramePointer() const = 0;
+ virtual unsigned getStackPointer() const = 0;
+
+ // This method gives the the number of bytes of stack spaceallocated
+ // to a register when it is spilled to the stack.
+ //
+ virtual int getSpilledRegSize(int RegType) const = 0;
};
+} // End llvm namespace
#endif
-
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projects / oota-llvm.git / blobdiff