Use Function's arg_size() and size() methods.

[oota-llvm.git] / include / llvm / Target / TargetRegisterInfo.h

diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index dbf77475aad64fc630d9d8178d3277a951690130..08b9bfc7649022140b3fe3d2251c9caa80d49093 100644 (file)
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -49,7 +49,7 @@ class Type;
 ///
 struct TargetRegisterDesc {
   const char     *AsmName;      // Assembly language name for the register
-  const char     *PrintableName;// Printable name for the reg (for debugging)
+  const char     *Name;         // Printable name for the reg (for debugging)
   const unsigned *AliasSet;     // Register Alias Set, described above
   const unsigned *SubRegs;      // Sub-register set, described above
   const unsigned *ImmSubRegs;   // Immediate sub-register set, described above
@@ -61,7 +61,7 @@ public:
   typedef const unsigned* iterator;
   typedef const unsigned* const_iterator;
 
-  typedef const MVT::ValueType* vt_iterator;
+  typedef const MVT* vt_iterator;
   typedef const TargetRegisterClass* const * sc_iterator;
 private:
   unsigned ID;
@@ -76,7 +76,7 @@ private:
   const iterator RegsBegin, RegsEnd;
 public:
   TargetRegisterClass(unsigned id,
-                      const MVT::ValueType *vts,
+                      const MVT *vts,
                       const TargetRegisterClass * const *subcs,
                       const TargetRegisterClass * const *supcs,
                       const TargetRegisterClass * const *subregcs,
@@ -99,7 +99,7 @@ public:
 
   /// getNumRegs - Return the number of registers in this class.
   ///
-  unsigned getNumRegs() const { return RegsEnd-RegsBegin; }
+  unsigned getNumRegs() const { return (unsigned)(RegsEnd-RegsBegin); }
 
   /// getRegister - Return the specified register in the class.
   ///
@@ -118,7 +118,7 @@ public:
 
   /// hasType - return true if this TargetRegisterClass has the ValueType vt.
   ///
-  bool hasType(MVT::ValueType vt) const {
+  bool hasType(MVT vt) const {
     for(int i = 0; VTs[i] != MVT::Other; ++i)
       if (VTs[i] == vt)
         return true;
@@ -321,9 +321,10 @@ public:
   }
 
   /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
-  /// register of the given type.
-  const TargetRegisterClass *getPhysicalRegisterRegClass(MVT::ValueType VT,
-                                                         unsigned Reg) const;
+  /// register of the given type. If type is MVT::Other, then just return any
+  /// register class the register belongs to.
+  const TargetRegisterClass *getPhysicalRegisterRegClass(unsigned Reg,
+                                          MVT VT = MVT::Other) const;
 
   /// getAllocatableSet - Returns a bitset indexed by register number
   /// indicating if a register is allocatable or not. If a register class is
@@ -352,9 +353,10 @@ public:
     return get(RegNo).AliasSet;
   }
 
-  /// getSubRegisters - Return the set of registers that are sub-registers of
+  /// getSubRegisters - Return the list of registers that are sub-registers of
   /// the specified register, or a null list of there are none. The list
-  /// returned is zero terminated.
+  /// returned is zero terminated and sorted according to super-sub register
+  /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH.
   ///
   const unsigned *getSubRegisters(unsigned RegNo) const {
     return get(RegNo).SubRegs;
@@ -368,24 +370,25 @@ public:
     return get(RegNo).ImmSubRegs;
   }
 
-  /// getSuperRegisters - Return the set of registers that are super-registers
+  /// getSuperRegisters - Return the list of registers that are super-registers
   /// of the specified register, or a null list of there are none. The list
-  /// returned is zero terminated.
+  /// returned is zero terminated and sorted according to super-sub register
+  /// relations. e.g. X86::AL's super-register list is RAX, EAX, AX.
   ///
   const unsigned *getSuperRegisters(unsigned RegNo) const {
     return get(RegNo).SuperRegs;
   }
 
-  /// getAsmName - Return the symbolic target specific name for the
+  /// getAsmName - Return the symbolic target-specific name for the
   /// specified physical register.
   const char *getAsmName(unsigned RegNo) const {
     return get(RegNo).AsmName;
   }
 
-  /// getPrintableName - Return the human-readable symbolic target specific name
-  /// for the specified physical register.
-  const char *getPrintableName(unsigned RegNo) const {
-    return get(RegNo).PrintableName;
+  /// getName - Return the human-readable symbolic target-specific name for the
+  /// specified physical register.
+  const char *getName(unsigned RegNo) const {
+    return get(RegNo).Name;
   }
 
   /// getNumRegs - Return the number of registers this target has (useful for
@@ -462,7 +465,7 @@ public:
   regclass_iterator regclass_end() const { return RegClassEnd; }
 
   unsigned getNumRegClasses() const {
-    return regclass_end()-regclass_begin();
+    return (unsigned)(regclass_end()-regclass_begin());
   }
   
   /// getRegClass - Returns the register class associated with the enumeration
@@ -486,13 +489,6 @@ public:
     return NULL;
   }
 
-  /// reMaterialize - Re-issue the specified 'original' instruction at the
-  /// specific location targeting a new destination register.
-  virtual void reMaterialize(MachineBasicBlock &MBB,
-                             MachineBasicBlock::iterator MI,
-                             unsigned DestReg,
-                             const MachineInstr *Orig) const = 0;
-
   /// targetHandlesStackFrameRounding - Returns true if the target is
   /// responsible for rounding up the stack frame (probably at emitPrologue
   /// time).