Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()

[oota-llvm.git] / include / llvm / Target / TargetRegisterInfo.h

diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index 7752203b98b868d3baeb0afd1766e8b290d78eaf..121b8a232526fd692b6d88bb2172830ea0c75af7 100644 (file)
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -46,8 +46,8 @@ public:
   const uint32_t *SubClassMask;
   const uint16_t *SuperRegIndices;
   const unsigned LaneMask;
-  /// Classes with high priority should be assigned first by register allocators
-  /// with a greedy heuristic. The priority is a value in the range [0,63].
+  /// Classes with a higher priority value are assigned first by register
+  /// allocators using a greedy heuristic. The value is in the range [0,63].
   const uint8_t AllocationPriority;
   /// Whether the class supports two (or more) disjunct subregister indices.
   const bool HasDisjunctSubRegs;