Remove the now unused StringRefMemoryObject.h.

[oota-llvm.git] / include / llvm / Target / TargetRegisterInfo.h

diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index c6f3fbf1c84991c5d6ed79471548e0e183b789f2..5080bb84b7e8c789abee2e2ff735e3aa92b3d4d0 100644 (file)
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -683,12 +683,6 @@ public:
   /// (3) Bottom-up allocation is no longer guaranteed to optimally color.
   virtual bool reverseLocalAssignment() const { return false; }
 
-  /// Allow the target to override register assignment heuristics based on the
-  /// live range size. If this returns false, then local live ranges are always
-  /// assigned in order regardless of their size. This is a temporary hook for
-  /// debugging downstream codegen failures exposed by regalloc.
-  virtual bool mayOverrideLocalAssignment() const { return true; }
-
   /// Allow the target to override the cost of using a callee-saved register for
   /// the first time. Default value of 0 means we will use a callee-saved
   /// register if it is available.
@@ -807,6 +801,18 @@ public:
                                    int SPAdj, unsigned FIOperandNum,
                                    RegScavenger *RS = nullptr) const = 0;
 
+  //===--------------------------------------------------------------------===//
+  /// Subtarget Hooks
+
+  /// \brief SrcRC and DstRC will be morphed into NewRC if this returns true.
+  virtual bool shouldCoalesce(MachineInstr *MI,
+                              const TargetRegisterClass *SrcRC,
+                              unsigned SubReg,
+                              const TargetRegisterClass *DstRC,
+                              unsigned DstSubReg,
+                              const TargetRegisterClass *NewRC) const
+  { return true; }
+
   //===--------------------------------------------------------------------===//
   /// Debug information queries.