Capture information about whether the target instructions have delay slots

[oota-llvm.git] / include / llvm / Target / TargetSchedInfo.h

diff --git a/include/llvm/Target/TargetSchedInfo.h b/include/llvm/Target/TargetSchedInfo.h
index ae97d109e3317d01c90f184669d302f541685d8a..f2a3560496cd1239690380858fa94d328d21c973 100644 (file)
--- a/include/llvm/Target/TargetSchedInfo.h
+++ b/include/llvm/Target/TargetSchedInfo.h
@@ -9,13 +9,15 @@
 //
 // This file describes the target machine to the instruction scheduler.
 //
+// NOTE: This file is currently sparc V9 specific.
+//
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TARGET_TARGETSCHEDINFO_H
 #define LLVM_TARGET_TARGETSCHEDINFO_H
 
 #include "llvm/Target/TargetInstrInfo.h"
-#include "Support/hash_map"
+#include "llvm/ADT/hash_map"
 #include <string>
 
 namespace llvm {
@@ -62,24 +64,15 @@ namespace llvm {
 
 typedef unsigned resourceId_t;
 
-struct MachineResource {
+struct CPUResource {
   const std::string rname;
   resourceId_t rid;
+  int maxNumUsers;   // MAXINT if no restriction
   
-  MachineResource(const std::string &resourceName)
-    : rname(resourceName), rid(nextId++) {}
-  
+  CPUResource(const std::string& resourceName, int maxUsers);
+  static CPUResource* getCPUResource(resourceId_t id);
 private:
   static resourceId_t nextId;
-  MachineResource();                   // disable
-};
-
-
-struct CPUResource : public MachineResource {
-  int maxNumUsers;   // MAXINT if no restriction
-  
-  CPUResource(const std::string& rname, int maxUsers)
-    : MachineResource(rname), maxNumUsers(maxUsers) {}
 };
 
 
@@ -191,16 +184,6 @@ struct TargetSchedInfo {
   unsigned maxNumIssueTotal;
   int  longestIssueConflict;
   
-  int  branchMispredictPenalty;        // 4 for SPARC IIi
-  int  branchTargetUnknownPenalty;     // 2 for SPARC IIi
-  int   l1DCacheMissPenalty;           // 7 or 9 for SPARC IIi
-  int   l1ICacheMissPenalty;           // ? for SPARC IIi
-  
-  bool inOrderLoads;                   // true for SPARC IIi
-  bool inOrderIssue;                   // true for SPARC IIi
-  bool inOrderExec;                    // false for most architectures
-  bool inOrderRetire;                  // true for most architectures
-  
 protected:
   inline const InstrRUsage& getInstrRUsage(MachineOpCode opCode) const {
     assert(opCode >= 0 && opCode < (int) instrRUsages.size());
@@ -321,9 +304,8 @@ protected:
                           conflictLists;   // indexed by [opcode]
 
 
-
-  friend class ModuloSchedGraph;
-  friend class ModuloScheduling;
+  friend class ModuloSchedulingPass;
+  friend class MSSchedule;
   
 };