watchdog: implement error handling for failure to set up hardware perf events

[firefly-linux-kernel-4.4.55.git] / kernel / irq / manage.c

diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 886d09e691d5a8d180826f2d5581c6bfb252d63c..e68932bb308e96e1c6aa184dc7d9972fba8df06e 100644 (file)
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -68,14 +68,20 @@ static void __synchronize_hardirq(struct irq_desc *desc)
  *     Do not use this for shutdown scenarios where you must be sure
  *     that all parts (hardirq and threaded handler) have completed.
  *
+ *     Returns: false if a threaded handler is active.
+ *
  *     This function may be called - with care - from IRQ context.
  */
-void synchronize_hardirq(unsigned int irq)
+bool synchronize_hardirq(unsigned int irq)
 {
        struct irq_desc *desc = irq_to_desc(irq);
 
-       if (desc)
+       if (desc) {
                __synchronize_hardirq(desc);
+               return !atomic_read(&desc->threads_active);
+       }
+
+       return true;
 }
 EXPORT_SYMBOL(synchronize_hardirq);
 
@@ -440,6 +446,32 @@ void disable_irq(unsigned int irq)
 }
 EXPORT_SYMBOL(disable_irq);
 
+/**
+ *     disable_hardirq - disables an irq and waits for hardirq completion
+ *     @irq: Interrupt to disable
+ *
+ *     Disable the selected interrupt line.  Enables and Disables are
+ *     nested.
+ *     This function waits for any pending hard IRQ handlers for this
+ *     interrupt to complete before returning. If you use this function while
+ *     holding a resource the hard IRQ handler may need you will deadlock.
+ *
+ *     When used to optimistically disable an interrupt from atomic context
+ *     the return value must be checked.
+ *
+ *     Returns: false if a threaded handler is active.
+ *
+ *     This function may be called - with care - from IRQ context.
+ */
+bool disable_hardirq(unsigned int irq)
+{
+       if (!__disable_irq_nosync(irq))
+               return synchronize_hardirq(irq);
+
+       return false;
+}
+EXPORT_SYMBOL_GPL(disable_hardirq);
+
 void __enable_irq(struct irq_desc *desc, unsigned int irq)
 {
        switch (desc->depth) {
@@ -1766,3 +1798,94 @@ int request_percpu_irq(unsigned int irq, irq_handler_t handler,
 
        return retval;
 }
+
+/**
+ *     irq_get_irqchip_state - returns the irqchip state of a interrupt.
+ *     @irq: Interrupt line that is forwarded to a VM
+ *     @which: One of IRQCHIP_STATE_* the caller wants to know about
+ *     @state: a pointer to a boolean where the state is to be storeed
+ *
+ *     This call snapshots the internal irqchip state of an
+ *     interrupt, returning into @state the bit corresponding to
+ *     stage @which
+ *
+ *     This function should be called with preemption disabled if the
+ *     interrupt controller has per-cpu registers.
+ */
+int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+                         bool *state)
+{
+       struct irq_desc *desc;
+       struct irq_data *data;
+       struct irq_chip *chip;
+       unsigned long flags;
+       int err = -EINVAL;
+
+       desc = irq_get_desc_buslock(irq, &flags, 0);
+       if (!desc)
+               return err;
+
+       data = irq_desc_get_irq_data(desc);
+
+       do {
+               chip = irq_data_get_irq_chip(data);
+               if (chip->irq_get_irqchip_state)
+                       break;
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+               data = data->parent_data;
+#else
+               data = NULL;
+#endif
+       } while (data);
+
+       if (data)
+               err = chip->irq_get_irqchip_state(data, which, state);
+
+       irq_put_desc_busunlock(desc, flags);
+       return err;
+}
+
+/**
+ *     irq_set_irqchip_state - set the state of a forwarded interrupt.
+ *     @irq: Interrupt line that is forwarded to a VM
+ *     @which: State to be restored (one of IRQCHIP_STATE_*)
+ *     @val: Value corresponding to @which
+ *
+ *     This call sets the internal irqchip state of an interrupt,
+ *     depending on the value of @which.
+ *
+ *     This function should be called with preemption disabled if the
+ *     interrupt controller has per-cpu registers.
+ */
+int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+                         bool val)
+{
+       struct irq_desc *desc;
+       struct irq_data *data;
+       struct irq_chip *chip;
+       unsigned long flags;
+       int err = -EINVAL;
+
+       desc = irq_get_desc_buslock(irq, &flags, 0);
+       if (!desc)
+               return err;
+
+       data = irq_desc_get_irq_data(desc);
+
+       do {
+               chip = irq_data_get_irq_chip(data);
+               if (chip->irq_set_irqchip_state)
+                       break;
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+               data = data->parent_data;
+#else
+               data = NULL;
+#endif
+       } while (data);
+
+       if (data)
+               err = chip->irq_set_irqchip_state(data, which, val);
+
+       irq_put_desc_busunlock(desc, flags);
+       return err;
+}