struct BranchFolder : public MachineFunctionPass {
static char ID;
- BranchFolder(bool defaultEnableTailMerge) :
+ explicit BranchFolder(bool defaultEnableTailMerge) :
MachineFunctionPass((intptr_t)&ID) {
switch (FlagEnableTailMerge) {
case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
unsigned TailLen = 0;
while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
--I1; --I2;
- if (!I1->isIdenticalTo(I2)) {
+ if (!I1->isIdenticalTo(I2) ||
+ // FIXME: This check is dubious. It's used to get around a problem where
+ // people incorrectly expect inline asm directives to remain in the same
+ // relative order. This is untenable because normal compiler
+ // optimizations (like this one) may reorder and/or merge these
+ // directives.
+ I1->getOpcode() == TargetInstrInfo::INLINEASM) {
++I1; ++I2;
break;
}
else if (p.second->getNumber() > q.second->getNumber())
return false;
else {
- // _GLIBCXX_DEBUG needs to check strict weak ordering and it
- // does it by doing a compare on the same object.
-#ifdef _GLIBCXX_DEBUG
- return(false);
-#else
+ // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
+ // an object with itself.
+#ifndef _GLIBCXX_DEBUG
assert(0 && "Predecessor appears twice");
#endif
+ return(false);
}
}