Use a default alignment for data and bss sections.

[oota-llvm.git] / lib / CodeGen / CMakeLists.txt

diff --git a/lib/CodeGen/CMakeLists.txt b/lib/CodeGen/CMakeLists.txt
index b5d3e263cfa6ef5d0a221716d65e9f1567bb154d..5ba8b3c147a2006dfa7de88c660d25ae47ba3c86 100644 (file)
--- a/lib/CodeGen/CMakeLists.txt
+++ b/lib/CodeGen/CMakeLists.txt
@@ -1,6 +1,9 @@
 add_llvm_library(LLVMCodeGen
   BranchFolding.cpp
+  CodePlacementOpt.cpp
   DeadMachineInstructionElim.cpp
+  DwarfEHPrepare.cpp
+  ELFCodeEmitter.cpp
   ELFWriter.cpp
   GCMetadata.cpp
   GCMetadataPrinter.cpp
@@ -8,12 +11,14 @@ add_llvm_library(LLVMCodeGen
   IfConversion.cpp
   IntrinsicLowering.cpp
   LLVMTargetMachine.cpp
+  LatencyPriorityQueue.cpp
+  LazyLiveness.cpp
   LiveInterval.cpp
   LiveIntervalAnalysis.cpp
   LiveStackAnalysis.cpp
   LiveVariables.cpp
-  LoopAligner.cpp
   LowerSubregs.cpp
+  MachOCodeEmitter.cpp
   MachOWriter.cpp
   MachineBasicBlock.cpp
   MachineDominators.cpp
@@ -25,6 +30,7 @@ add_llvm_library(LLVMCodeGen
   MachinePassRegistry.cpp
   MachineRegisterInfo.cpp
   MachineSink.cpp
+  MachineVerifier.cpp
   OcamlGC.cpp
   PBQP.cpp
   PHIElimination.cpp
@@ -40,12 +46,20 @@ add_llvm_library(LLVMCodeGen
   RegAllocSimple.cpp
   RegisterCoalescer.cpp
   RegisterScavenging.cpp
+  ScheduleDAG.cpp
+  ScheduleDAGEmit.cpp
+  ScheduleDAGInstrs.cpp
+  ScheduleDAGPrinter.cpp
   ShadowStackGC.cpp
+  ShrinkWrapping.cpp
   SimpleRegisterCoalescing.cpp
+  Spiller.cpp
+  StackProtector.cpp
   StackSlotColoring.cpp
   StrongPHIElimination.cpp
   TargetInstrInfoImpl.cpp
   TwoAddressInstructionPass.cpp
   UnreachableBlockElim.cpp
   VirtRegMap.cpp
+  VirtRegRewriter.cpp
   )