#include "llvm/IntrinsicInst.h"
#include "llvm/Module.h"
#include "llvm/Pass.h"
-#include "llvm/Support/Compiler.h"
+#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include "llvm/Transforms/Utils/PromoteMemToReg.h"
STATISTIC(NumStackTempsIntroduced, "Number of stack temporaries introduced");
namespace {
- class VISIBILITY_HIDDEN DwarfEHPrepare : public FunctionPass {
+ class DwarfEHPrepare : public FunctionPass {
const TargetLowering *TLI;
bool CompileFast;
bool DwarfEHPrepare::NormalizeLandingPads() {
bool Changed = false;
+ const MCAsmInfo *MAI = TLI->getTargetMachine().getMCAsmInfo();
+ bool usingSjLjEH = MAI->getExceptionHandlingType() == ExceptionHandling::SjLj;
+
for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
TerminatorInst *TI = I->getTerminator();
if (!isa<InvokeInst>(TI))
// Check that only invoke unwind edges end at the landing pad.
bool OnlyUnwoundTo = true;
+ bool SwitchOK = usingSjLjEH;
for (pred_iterator PI = pred_begin(LPad), PE = pred_end(LPad);
PI != PE; ++PI) {
TerminatorInst *PT = (*PI)->getTerminator();
+ // The SjLj dispatch block uses a switch instruction. This is effectively
+ // an unwind edge, so we can disregard it here. There will only ever
+ // be one dispatch, however, so if there are multiple switches, one
+ // of them truly is a normal edge, not an unwind edge.
+ if (SwitchOK && isa<SwitchInst>(PT)) {
+ SwitchOK = false;
+ continue;
+ }
if (!isa<InvokeInst>(PT) || LPad == PT->getSuccessor(0)) {
OnlyUnwoundTo = false;
break;
if (!RewindFunction) {
LLVMContext &Ctx = UnwindInsts[0]->getContext();
std::vector<const Type*>
- Params(1, PointerType::getUnqual(Type::getInt8Ty(Ctx)));
+ Params(1, Type::getInt8PtrTy(Ctx));
FunctionType *FTy = FunctionType::get(Type::getVoidTy(Ctx),
Params, false);
const char *RewindName = TLI->getLibcallName(RTLIB::UNWIND_RESUME);
if (ExceptionValueVar && DT && DF && isAllocaPromotable(ExceptionValueVar)) {
// Turn the exception temporary into registers and phi nodes if possible.
std::vector<AllocaInst*> Allocas(1, ExceptionValueVar);
- PromoteMemToReg(Allocas, *DT, *DF, ExceptionValueVar->getContext());
+ PromoteMemToReg(Allocas, *DT, *DF);
return true;
}
return false;