#include "llvm/Support/CommandLine.h"
using namespace llvm;
-static cl::opt<bool> PrintLSR("print-lsr-output");
-static cl::opt<bool> PrintISelInput("print-isel-input");
+static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
+ cl::desc("Print LLVM IR produced by the loop-reduce pass"));
+static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
+ cl::desc("Print LLVM IR input to isel pass"));
+static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
+ cl::desc("Dump emitter generated instructions as assembly"));
+
FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
std::ostream &Out,
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
+
if (!ExceptionHandling)
PM.add(createLowerInvokePass(getTargetLowering()));
-
+
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+
+ PM.add(createLowerSubregsPass());
+
+ if (PrintMachineCode) // Print the subreg lowered code
+ PM.add(createMachineFunctionPrinterPass(cerr));
// Run post-ra passes.
if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
+ // Second pass scheduler.
+ if (!Fast)
+ PM.add(createPostRAScheduler());
+
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
- PM.add(createBranchFoldingPass(DoTailMergeDefault()));
+ PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
// Fold redundant debug labels.
PM.add(createDebugLabelFoldingPass());
MachineCodeEmitter *MCE,
bool Fast) {
if (MCE)
- addSimpleCodeEmitter(PM, Fast, *MCE);
+ addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
// Delete machine code for this function
PM.add(createMachineCodeDeleter());
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+
+ PM.add(createLowerSubregsPass());
+
+ if (PrintMachineCode) // Print the subreg lowered code
+ PM.add(createMachineFunctionPrinterPass(cerr));
// Run post-ra passes.
if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
if (PrintMachineCode) // Print the register-allocated code
PM.add(createMachineFunctionPrinterPass(cerr));
+ // Second pass scheduler.
+ if (!Fast)
+ PM.add(createPostRAScheduler());
+
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
- PM.add(createBranchFoldingPass(DoTailMergeDefault()));
+ PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- addCodeEmitter(PM, Fast, MCE);
+ addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
// Delete machine code for this function
PM.add(createMachineCodeDeleter());