Typo.

[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 500f0e0941c35bb451117d00fd87f626b7cde698..526c5255fe3a277dd96fc40cae5fba2cf4a0dced 100644 (file)
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -26,6 +26,8 @@ static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
     cl::desc("Print LLVM IR input to isel pass"));
+static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
+    cl::desc("Dump emitter generated instructions as assembly"));
 
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
@@ -43,11 +45,10 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
-  
-  // FIXME: Implement the invoke/unwind instructions!
+
   if (!ExceptionHandling)
     PM.add(createLowerInvokePass(getTargetLowering()));
-  
+
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
@@ -71,6 +72,11 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -79,6 +85,10 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
   PM.add(createPrologEpilogCodeInserter());
   
+  // Second pass scheduler.
+  if (!Fast)
+    PM.add(createPostRAScheduler());
+
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
@@ -116,7 +126,7 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
                                                   MachineCodeEmitter *MCE,
                                                   bool Fast) {
   if (MCE)
-    addSimpleCodeEmitter(PM, Fast, *MCE);
+    addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
 
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());
@@ -171,6 +181,11 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -182,6 +197,10 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   if (PrintMachineCode)  // Print the register-allocated code
     PM.add(createMachineFunctionPrinterPass(cerr));
   
+  // Second pass scheduler.
+  if (!Fast)
+    PM.add(createPostRAScheduler());
+
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
@@ -189,7 +208,7 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  addCodeEmitter(PM, Fast, MCE);
+  addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
   
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());