Typo.
[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp
index b50b2753922a9aeee887a2bc65356fe39ea758b5..526c5255fe3a277dd96fc40cae5fba2cf4a0dced 100644 (file)
@@ -26,6 +26,8 @@ static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
     cl::desc("Print LLVM IR input to isel pass"));
+static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
+    cl::desc("Dump emitter generated instructions as assembly"));
 
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
@@ -70,6 +72,11 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -79,7 +86,8 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   PM.add(createPrologEpilogCodeInserter());
   
   // Second pass scheduler.
-  PM.add(createPostRAScheduler());
+  if (!Fast)
+    PM.add(createPostRAScheduler());
 
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
@@ -118,7 +126,7 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
                                                   MachineCodeEmitter *MCE,
                                                   bool Fast) {
   if (MCE)
-    addSimpleCodeEmitter(PM, Fast, *MCE);
+    addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
 
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());
@@ -173,6 +181,11 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -185,7 +198,8 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
     PM.add(createMachineFunctionPrinterPass(cerr));
   
   // Second pass scheduler.
-  PM.add(createPostRAScheduler());
+  if (!Fast)
+    PM.add(createPostRAScheduler());
 
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
@@ -194,7 +208,7 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  addCodeEmitter(PM, Fast, MCE);
+  addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
   
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());