Typo.

[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index d7b27bd84d2cf0b0772992384e52bfdda224e8b5..526c5255fe3a277dd96fc40cae5fba2cf4a0dced 100644 (file)
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -14,12 +14,21 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/PassManager.h"
 #include "llvm/Pass.h"
+#include "llvm/Assembly/PrintModulePass.h"
 #include "llvm/Analysis/LoopPass.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Transforms/Scalar.h"
+#include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
+static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
+    cl::desc("Print LLVM IR produced by the loop-reduce pass"));
+static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
+    cl::desc("Print LLVM IR input to isel pass"));
+static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
+    cl::desc("Dump emitter generated instructions as assembly"));
+
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
                                        std::ostream &Out,
@@ -28,18 +37,28 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   // Standard LLVM-Level Passes.
   
   // Run loop strength reduction before anything else.
-  if (!Fast) PM.add(createLoopStrengthReducePass(getTargetLowering()));
+  if (!Fast) {
+    PM.add(createLoopStrengthReducePass(getTargetLowering()));
+    if (PrintLSR)
+      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
+  }
   
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
-  
-  // FIXME: Implement the invoke/unwind instructions!
+
   if (!ExceptionHandling)
     PM.add(createLowerInvokePass(getTargetLowering()));
-  
+
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
+  if (!Fast)
+    PM.add(createCodeGenPreparePass(getTargetLowering()));
+
+  if (PrintISelInput)
+    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
+                                 &cerr));
+  
   // Ask the target for an isel.
   if (addInstSelector(PM, Fast))
     return FileModel::Error;
@@ -53,6 +72,11 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -61,9 +85,13 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
   PM.add(createPrologEpilogCodeInserter());
   
+  // Second pass scheduler.
+  if (!Fast)
+    PM.add(createPostRAScheduler());
+
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
-    PM.add(createBranchFoldingPass());
+    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
     
   // Fold redundant debug labels.
   PM.add(createDebugLabelFoldingPass());
@@ -98,7 +126,7 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
                                                   MachineCodeEmitter *MCE,
                                                   bool Fast) {
   if (MCE)
-    addSimpleCodeEmitter(PM, Fast, *MCE);
+    addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
 
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());
@@ -118,7 +146,11 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   // Standard LLVM-Level Passes.
   
   // Run loop strength reduction before anything else.
-  if (!Fast) PM.add(createLoopStrengthReducePass(getTargetLowering()));
+  if (!Fast) {
+    PM.add(createLoopStrengthReducePass(getTargetLowering()));
+    if (PrintLSR)
+      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
+  }
   
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
@@ -129,6 +161,13 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
+  if (!Fast)
+    PM.add(createCodeGenPreparePass(getTargetLowering()));
+
+  if (PrintISelInput)
+    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
+                                 &cerr));
+
   // Ask the target for an isel.
   if (addInstSelector(PM, Fast))
     return true;
@@ -142,6 +181,11 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -153,14 +197,18 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   if (PrintMachineCode)  // Print the register-allocated code
     PM.add(createMachineFunctionPrinterPass(cerr));
   
+  // Second pass scheduler.
+  if (!Fast)
+    PM.add(createPostRAScheduler());
+
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
-    PM.add(createBranchFoldingPass());
+    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
   
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  addCodeEmitter(PM, Fast, MCE);
+  addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
   
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());