Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp
index e1dd46342d4fddd2c8073bcdb130b94e68833d4c..7def8fa61d2a3c57f825a4c7a656519e41b07b7c 100644 (file)
@@ -42,10 +42,6 @@ static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
 static cl::opt<bool>
 EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
               cl::desc("Perform sinking on machine code"));
-static cl::opt<bool>
-EnableLICM("machine-licm",
-           cl::init(false), cl::Hidden,
-           cl::desc("Perform loop-invariant code motion on machine code"));
 
 // When this works it will be on by default.
 static cl::opt<bool>
@@ -60,11 +56,6 @@ static cl::opt<cl::boolOrDefault>
 EnableFastISelOption("fast-isel", cl::Hidden,
   cl::desc("Enable the experimental \"fast\" instruction selector"));
 
-// Enable stack protectors.
-static cl::opt<int>
-EnableStackProtector("enable-stack-protector", cl::init(0),
-                     cl::desc("Use ProPolice as a stack protection method."));
-
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
                                        raw_ostream &Out,
@@ -170,7 +161,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (!Fast)
     PM.add(createCodeGenPreparePass(getTargetLowering()));
 
-  PM.add(createStackProtectorPass(EnableStackProtector));
+  PM.add(createStackProtectorPass(getTargetLowering()));
 
   if (PrintISelInput)
     PM.add(createPrintFunctionPass("\n\n"
@@ -192,7 +183,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  if (EnableLICM)
+  if (!Fast)
     PM.add(createMachineLICMPass());
 
   if (EnableSinking)
@@ -231,13 +222,20 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
     PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Second pass scheduler.
-  if (!Fast && !DisablePostRAScheduler)
+  if (!Fast && !DisablePostRAScheduler) {
     PM.add(createPostRAScheduler());
 
+    if (PrintMachineCode)
+      PM.add(createMachineFunctionPrinterPass(cerr));
+  }
+
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 
+  if (PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   PM.add(createGCMachineCodeAnalysisPass());
 
   if (PrintMachineCode)