Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty

[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index f29944c7c90b5d8f500eb91c31e0a521bc4051ab..7def8fa61d2a3c57f825a4c7a656519e41b07b7c 100644 (file)
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -38,6 +38,11 @@ static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
     cl::desc("Dump garbage collector data"));
 
+// Hidden options to help debugging
+static cl::opt<bool>
+EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
+              cl::desc("Perform sinking on machine code"));
+
 // When this works it will be on by default.
 static cl::opt<bool>
 DisablePostRAScheduler("disable-post-RA-scheduler",
@@ -178,10 +183,11 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  if (!Fast) {
+  if (!Fast)
     PM.add(createMachineLICMPass());
+
+  if (EnableSinking)
     PM.add(createMachineSinkingPass());
-  }
 
   // Run pre-ra passes.
   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)