// Enable or disable FastISel. Both options are needed, because
// FastISel is enabled by default with -fast, and we wish to be
// able to enable or disable fast-isel independently from -fast.
-static cl::opt<bool>
+static cl::opt<cl::boolOrDefault>
EnableFastISelOption("fast-isel", cl::Hidden,
cl::desc("Enable the experimental \"fast\" instruction selector"));
-static cl::opt<bool>
-DisableFastISelOption("disable-fast-isel", cl::Hidden,
- cl::desc("Disable the experimental \"fast\" instruction selector"));
FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
if (!Fast) {
PM.add(createLoopStrengthReducePass(getTargetLowering()));
if (PrintLSR)
- PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
+ PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &errs()));
}
PM.add(createGCLoweringPass());
if (!Fast)
PM.add(createCodeGenPreparePass(getTargetLowering()));
+ PM.add(createStackProtectorPass(getTargetLowering()));
+
if (PrintISelInput)
- PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
- &cerr));
+ PM.add(createPrintFunctionPass("\n\n"
+ "*** Final LLVM Code input to ISel ***\n",
+ &errs()));
// Standard Lower-Level Passes.
// Enable FastISel with -fast, but allow that to be overridden.
- assert((!EnableFastISelOption || !DisableFastISelOption) &&
- "Both -fast-isel and -disable-fast-isel given!");
- if (EnableFastISelOption ||
- (Fast && !DisableFastISelOption))
+ if (EnableFastISelOption == cl::BOU_TRUE ||
+ (Fast && EnableFastISelOption != cl::BOU_FALSE))
EnableFastISel = true;
// Ask the target for an isel.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- // If we're using Fast-ISel, clean up the mess.
- if (EnableFastISel)
- PM.add(createDeadMachineInstructionElimPass());
-
if (EnableLICM)
PM.add(createMachineLICMPass());
PM.add(createMachineFunctionPrinterPass(cerr));
// Second pass scheduler.
- if (!Fast && !DisablePostRAScheduler)
+ if (!Fast && !DisablePostRAScheduler) {
PM.add(createPostRAScheduler());
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+ }
+
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
PM.add(createGCMachineCodeAnalysisPass());
if (PrintMachineCode)