if (!Fast)
PM.add(createCodeGenPreparePass(getTargetLowering()));
+ PM.add(createStackProtectorPass(getTargetLowering()));
+
if (PrintISelInput)
PM.add(createPrintFunctionPass("\n\n"
"*** Final LLVM Code input to ISel ***\n",
PM.add(createMachineFunctionPrinterPass(cerr));
// Second pass scheduler.
- if (!Fast && !DisablePostRAScheduler)
+ if (!Fast && !DisablePostRAScheduler) {
PM.add(createPostRAScheduler());
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+ }
+
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
PM.add(createGCMachineCodeAnalysisPass());
if (PrintMachineCode)