Get rid of 3 non-DebugLoc getNode variants.

[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index fee70b00154baf1b77f32c281e0fa5bb4e3cee5a..c9ff15d4947f021aac7cc205d237fa293af11bc4 100644 (file)
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -60,19 +60,6 @@ static cl::opt<cl::boolOrDefault>
 EnableFastISelOption("fast-isel", cl::Hidden,
   cl::desc("Enable the experimental \"fast\" instruction selector"));
 
-// Enable stack protectors.
-static cl::opt<SSP::StackProtectorLevel>
-EnableStackProtector("enable-stack-protector",
-                     cl::desc("Stack canary protection level: (default: off)"),
-                     cl::init(SSP::OFF),
-                     cl::values(clEnumValN(SSP::ALL,  "all",
-                                         "All functions get stack protectors."),
-                                clEnumValN(SSP::SOME, "some",
-                         "Only functions requiring stack protectors get them."),
-                                clEnumValN(SSP::OFF,  "off",
-                                          "No functions get stack protectors."),
-                                clEnumValEnd));
-
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
                                        raw_ostream &Out,
@@ -178,8 +165,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (!Fast)
     PM.add(createCodeGenPreparePass(getTargetLowering()));
 
-  if (EnableStackProtector != SSP::OFF)
-    PM.add(createStackProtectorPass(EnableStackProtector, getTargetLowering()));
+  PM.add(createStackProtectorPass(getTargetLowering()));
 
   if (PrintISelInput)
     PM.add(createPrintFunctionPass("\n\n"
@@ -240,13 +226,20 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
     PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Second pass scheduler.
-  if (!Fast && !DisablePostRAScheduler)
+  if (!Fast && !DisablePostRAScheduler) {
     PM.add(createPostRAScheduler());
 
+    if (PrintMachineCode)
+      PM.add(createMachineFunctionPrinterPass(cerr));
+  }
+
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   if (!Fast)
     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 
+  if (PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   PM.add(createGCMachineCodeAnalysisPass());
 
   if (PrintMachineCode)