#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/Collector.h"
#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Support/CommandLine.h"
using namespace llvm;
EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
cl::desc("Perform sinking on machine code"));
static cl::opt<bool>
-AlignLoops("align-loops", cl::init(true), cl::Hidden,
- cl::desc("Align loop headers"));
-static cl::opt<bool>
-PerformLICM("machine-licm",
+EnableStackColoring("stack-coloring",
cl::init(false), cl::Hidden,
- cl::desc("Perform loop-invariant code motion on machine code"));
+ cl::desc("Perform stack slot coloring"));
+static cl::opt<bool>
+EnableLICM("machine-licm",
+ cl::init(false), cl::Hidden,
+ cl::desc("Perform loop-invariant code motion on machine code"));
// When this works it will be on by default.
static cl::opt<bool>
if (!Fast) {
PM.add(createLoopStrengthReducePass(getTargetLowering()));
if (PrintLSR)
- PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
+ PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
}
PM.add(createGCLoweringPass());
- if (!ExceptionHandling)
+ if (!getTargetAsmInfo()->doesSupportExceptionHandling())
PM.add(createLowerInvokePass(getTargetLowering()));
// Make sure that no unreachable blocks are instruction selected.
PM.add(createCodeGenPreparePass(getTargetLowering()));
if (PrintISelInput)
- PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
+ PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
&cerr));
// Ask the target for an isel.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- if (PerformLICM)
+ if (EnableLICM)
PM.add(createMachineLICMPass());
if (EnableSinking)
PM.add(createMachineSinkingPass());
+ // Run pre-ra passes.
+ if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
- if (PrintMachineCode)
+ // Perform stack slot coloring.
+ if (EnableStackColoring)
+ PM.add(createStackSlotColoringPass());
+
+ if (PrintMachineCode) // Print the register-allocated code
PM.add(createMachineFunctionPrinterPass(cerr));
-
- PM.add(createLowerSubregsPass());
- if (PrintMachineCode) // Print the subreg lowered code
- PM.add(createMachineFunctionPrinterPass(cerr));
-
// Run post-ra passes.
if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+ PM.add(createLowerSubregsPass());
+
+ if (PrintMachineCode) // Print the subreg lowered code
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
// Second pass scheduler.
if (!Fast && !DisablePostRAScheduler)
PM.add(createPostRAScheduler());
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- if (AlignLoops && !OptimizeForSize)
+ if (!Fast && !OptimizeForSize)
PM.add(createLoopAlignerPass());
switch (FileType) {
if (!Fast) {
PM.add(createLoopStrengthReducePass(getTargetLowering()));
if (PrintLSR)
- PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
+ PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
}
PM.add(createGCLoweringPass());
- if (!ExceptionHandling)
+ if (!getTargetAsmInfo()->doesSupportExceptionHandling())
PM.add(createLowerInvokePass(getTargetLowering()));
// Make sure that no unreachable blocks are instruction selected.
PM.add(createCodeGenPreparePass(getTargetLowering()));
if (PrintISelInput)
- PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
+ PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
&cerr));
// Ask the target for an isel.
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- if (PerformLICM)
+ if (EnableLICM)
PM.add(createMachineLICMPass());
if (EnableSinking)
PM.add(createMachineSinkingPass());
- // Perform register allocation to convert to a concrete x86 representation
+ // Run pre-ra passes.
+ if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
+ // Perform register allocation.
PM.add(createRegisterAllocator());
-
+
+ // Perform stack slot coloring.
+ if (EnableStackColoring)
+ PM.add(createStackSlotColoringPass());
+
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+ // Run post-ra passes.
+ if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
+ if (PrintMachineCode) // Print the register-allocated code
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
PM.add(createLowerSubregsPass());
if (PrintMachineCode) // Print the subreg lowered code
PM.add(createMachineFunctionPrinterPass(cerr));
- // Run post-ra passes.
- if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(cerr));
-
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
- if (PrintMachineCode) // Print the register-allocated code
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
// Second pass scheduler.
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
PM.add(createGCMachineCodeAnalysisPass());
+
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));