#ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
#define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
+#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "LiveInterval.h"
typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
Reg2IntervalMap r2iMap_;
- typedef std::map<unsigned, unsigned> Reg2RegMap;
+ typedef DenseMap<unsigned> Reg2RegMap;
Reg2RegMap r2rMap_;
+ std::vector<bool> allocatableRegs_;
+
public:
struct InstrSlots
{
return getBaseIndex(index) + InstrSlots::STORE;
}
- // FIXME: this should really be a const_iterator
typedef Reg2IntervalMap::iterator iterator;
+ typedef Reg2IntervalMap::const_iterator const_iterator;
+ const_iterator begin() const { return r2iMap_.begin(); }
+ const_iterator end() const { return r2iMap_.end(); }
iterator begin() { return r2iMap_.begin(); }
iterator end() { return r2iMap_.end(); }
unsigned getNumIntervals() const { return r2iMap_.size(); }
/// runOnMachineFunction - pass entry point
virtual bool runOnMachineFunction(MachineFunction&);
+ /// print - Implement the dump method.
+ virtual void print(std::ostream &O, const Module* = 0) const;
+
private:
/// computeIntervals - compute live intervals
void computeIntervals();
/// register classes. The registers may be either phys or virt regs.
bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
- bool overlapsAliases(const LiveInterval *lhs,
+ bool overlapsAliases(const LiveInterval *lhs,
const LiveInterval *rhs) const;
static LiveInterval createInterval(unsigned Reg);
}
/// rep - returns the representative of this register
- unsigned rep(unsigned reg) {
- Reg2RegMap::iterator it = r2rMap_.find(reg);
- if (it != r2rMap_.end())
- return it->second = rep(it->second);
- return reg;
+ unsigned rep(unsigned Reg) {
+ unsigned Rep = r2rMap_[Reg];
+ if (Rep)
+ return r2rMap_[Reg] = rep(Rep);
+ return Reg;
}
void printRegName(unsigned reg) const;