/// Get some space for a respectable number of registers...
VirtRegInfo.resize(64);
+
+ // Mark live-in registers as live-in.
+ for (MachineFunction::liveinout_iterator I = MF.livein_begin(),
+ E = MF.livein_end(); I != E; ++I) {
+ assert(MRegisterInfo::isPhysicalRegister(*I) &&
+ "Cannot have a live-in virtual register!");
+ HandlePhysRegDef(*I, 0);
+ }
// Calculate live variable information in depth first order on the CFG of the
// function. This guarantees that we will see the definition of a virtual
}
}
+ // Finally, if the last block in the function is a return, make sure to mark
+ // it as using all of the live-out values in the function.
+ if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
+ MachineInstr *Ret = &MBB->back();
+ for (MachineFunction::liveinout_iterator I = MF.liveout_begin(),
+ E = MF.liveout_end(); I != E; ++I) {
+ assert(MRegisterInfo::isPhysicalRegister(*I) &&
+ "Cannot have a live-in virtual register!");
+ HandlePhysRegUse(*I, Ret);
+ }
+ }
+
// Loop over PhysRegInfo, killing any registers that are available at the
// end of the basic block. This also resets the PhysRegInfo map.
for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
// the instruction.
for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = OldMI->getOperand(i);
- if (MO.isRegister() && MO.isDef() && MO.getReg() &&
+ if (MO.isRegister() && MO.getReg() &&
MRegisterInfo::isVirtualRegister(MO.getReg())) {
unsigned Reg = MO.getReg();
VarInfo &VI = getVarInfo(Reg);
- if (VI.DefInst == OldMI)
- VI.DefInst = NewMI;
+ if (MO.isDef()) {
+ // Update the defining instruction.
+ if (VI.DefInst == OldMI)
+ VI.DefInst = NewMI;
+ }
+ if (MO.isUse()) {
+ // If this is a kill of the value, update the VI kills list.
+ if (VI.removeKill(OldMI))
+ VI.Kills.push_back(NewMI); // Yes, there was a kill of it
+ }
}
}