//===-- LiveVariables.cpp - Live Variable Analysis for Machine Code -------===//
//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
// This file implements the LiveVariable analysis pass. For each machine
// instruction in the function, this pass calculates the set of registers that
// are immediately dead after the instruction (i.e., the instruction calculates
static RegisterAnalysis<LiveVariables> X("livevars", "Live Variable Analysis");
+const std::pair<MachineBasicBlock*, unsigned> &
+LiveVariables::getMachineBasicBlockInfo(MachineBasicBlock *MBB) const{
+ return BBMap.find(MBB->getBasicBlock())->second;
+}
+
+LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
+ assert(RegIdx >= MRegisterInfo::FirstVirtualRegister &&
+ "getVarInfo: not a virtual register!");
+ RegIdx -= MRegisterInfo::FirstVirtualRegister;
+ if (RegIdx >= VirtRegInfo.size()) {
+ if (RegIdx >= 2*VirtRegInfo.size())
+ VirtRegInfo.resize(RegIdx*2);
+ else
+ VirtRegInfo.resize(2*VirtRegInfo.size());
+ }
+ return VirtRegInfo[RegIdx];
+}
+
+
+
void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
const BasicBlock *BB) {
const std::pair<MachineBasicBlock*,unsigned> &Info = BBMap.find(BB)->second;
if (PhysRegInfo[Reg]) {
PhysRegInfo[Reg] = MI;
PhysRegUsed[Reg] = true;
- } else if (const unsigned *AliasSet = RegInfo->getAliasSet(Reg)) {
- for (; unsigned NReg = AliasSet[0]; ++AliasSet)
- if (MachineInstr *LastUse = PhysRegInfo[NReg]) {
- PhysRegInfo[NReg] = MI;
- PhysRegUsed[NReg] = true;
+ } else {
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+ *AliasSet; ++AliasSet) {
+ if (MachineInstr *LastUse = PhysRegInfo[*AliasSet]) {
+ PhysRegInfo[*AliasSet] = MI;
+ PhysRegUsed[*AliasSet] = true;
}
+ }
}
}
RegistersKilled.insert(std::make_pair(LastUse, Reg));
else
RegistersDead.insert(std::make_pair(LastUse, Reg));
- } else if (const unsigned *AliasSet = RegInfo->getAliasSet(Reg)) {
- for (; unsigned NReg = AliasSet[0]; ++AliasSet)
- if (MachineInstr *LastUse = PhysRegInfo[NReg]) {
- if (PhysRegUsed[NReg])
- RegistersKilled.insert(std::make_pair(LastUse, NReg));
+ } else {
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+ *AliasSet; ++AliasSet) {
+ if (MachineInstr *LastUse = PhysRegInfo[*AliasSet]) {
+ if (PhysRegUsed[*AliasSet])
+ RegistersKilled.insert(std::make_pair(LastUse, *AliasSet));
else
- RegistersDead.insert(std::make_pair(LastUse, NReg));
- PhysRegInfo[NReg] = 0; // Kill the aliased register
+ RegistersDead.insert(std::make_pair(LastUse, *AliasSet));
+ PhysRegInfo[*AliasSet] = 0; // Kill the aliased register
}
+ }
}
PhysRegInfo[Reg] = MI;
PhysRegUsed[Reg] = false;
NumOperandsToProcess = 1;
// Loop over implicit uses, using them.
- if (const unsigned *ImplicitUses = MID.ImplicitUses)
- for (unsigned i = 0; ImplicitUses[i]; ++i)
- HandlePhysRegUse(ImplicitUses[i], MI);
+ for (const unsigned *ImplicitUses = MID.ImplicitUses;
+ *ImplicitUses; ++ImplicitUses)
+ HandlePhysRegUse(*ImplicitUses, MI);
// Process all explicit uses...
for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.opIsUse() || MO.opIsDefAndUse()) {
if (MO.isVirtualRegister() && !MO.getVRegValueOrNull()) {
- unsigned RegIdx = MO.getReg()-MRegisterInfo::FirstVirtualRegister;
- HandleVirtRegUse(getVarInfo(RegIdx), MBB, MI);
+ HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI);
} else if (MO.isPhysicalRegister() &&
AllocatablePhysicalRegisters[MO.getReg()]) {
HandlePhysRegUse(MO.getReg(), MI);
// Process all explicit defs...
for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.opIsDef() || MO.opIsDefAndUse()) {
+ if (MO.opIsDefOnly() || MO.opIsDefAndUse()) {
if (MO.isVirtualRegister()) {
- unsigned RegIdx = MO.getReg()-MRegisterInfo::FirstVirtualRegister;
- VarInfo &VRInfo = getVarInfo(RegIdx);
+ VarInfo &VRInfo = getVarInfo(MO.getReg());
assert(VRInfo.DefBlock == 0 && "Variable multiply defined!");
VRInfo.DefBlock = MBB; // Created here...
if (MI->getOperand(i+1).getMachineBasicBlock() == MBB) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.getVRegValueOrNull()) {
- unsigned RegIdx = MO.getReg()-MRegisterInfo::FirstVirtualRegister;
- VarInfo &VRInfo = getVarInfo(RegIdx);
+ VarInfo &VRInfo = getVarInfo(MO.getReg());
// Only mark it alive only in the block we are representing...
MarkVirtRegAliveInBlock(VRInfo, BB);
HandlePhysRegDef(i, 0);
}
- BBMap.clear();
-
// Convert the information we have gathered into VirtRegInfo and transform it
// into a form usable by RegistersKilled.
//