cerr << " Alive in blocks: ";
for (unsigned i = 0, e = AliveBlocks.size(); i != e; ++i)
if (AliveBlocks[i]) cerr << i << ", ";
+ cerr << " Used in blocks: ";
+ for (unsigned i = 0, e = UsedBlocks.size(); i != e; ++i)
+ if (UsedBlocks[i]) cerr << i << ", ";
cerr << "\n Killed by:";
if (Kills.empty())
cerr << " No instructions.\n";
else
VirtRegInfo.resize(2*VirtRegInfo.size());
}
- return VirtRegInfo[RegIdx];
-}
-
-/// registerOverlap - Returns true if register 1 is equal to register 2
-/// or if register 1 is equal to any of alias of register 2.
-static bool registerOverlap(unsigned Reg1, unsigned Reg2,
- const MRegisterInfo *RegInfo) {
- bool isVirt1 = MRegisterInfo::isVirtualRegister(Reg1);
- bool isVirt2 = MRegisterInfo::isVirtualRegister(Reg2);
- if (isVirt1 != isVirt2)
- return false;
- if (Reg1 == Reg2)
- return true;
- else if (isVirt1)
- return false;
- for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg2);
- unsigned Alias = *AliasSet; ++AliasSet) {
- if (Reg1 == Alias)
- return true;
- }
- return false;
+ VarInfo &VI = VirtRegInfo[RegIdx];
+ VI.AliveBlocks.resize(MF->getNumBlockIDs());
+ VI.UsedBlocks.resize(MF->getNumBlockIDs());
+ return VI;
}
bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isKill()) {
- if (registerOverlap(Reg, MO.getReg(), RegInfo))
+ if (RegInfo->regsOverlap(Reg, MO.getReg()))
return true;
}
}
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDead())
- if (registerOverlap(Reg, MO.getReg(), RegInfo))
+ if (RegInfo->regsOverlap(Reg, MO.getReg()))
return true;
}
return false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDef()) {
- if (registerOverlap(Reg, MO.getReg(), RegInfo))
+ if (RegInfo->regsOverlap(Reg, MO.getReg()))
return true;
}
}
if (MBB == VRInfo.DefInst->getParent()) return; // Terminate recursion
- if (VRInfo.AliveBlocks.size() <= BBNum)
- VRInfo.AliveBlocks.resize(BBNum+1); // Make space...
-
if (VRInfo.AliveBlocks[BBNum])
return; // We already know the block is live
MachineInstr *MI) {
assert(VRInfo.DefInst && "Register use before def!");
+ unsigned BBNum = MBB->getNumber();
+
+ VRInfo.UsedBlocks[BBNum] = true;
+
// Check to see if this basic block is already a kill block...
if (!VRInfo.Kills.empty() && VRInfo.Kills.back()->getParent() == MBB) {
// Yes, this register is killed in this basic block already. Increase the
"Should have kill for defblock!");
// Add a new kill entry for this basic block.
- VRInfo.Kills.push_back(MI);
+ // If this virtual register is already marked as alive in this basic block,
+ // that means it is alive in at least one of the successor block, it's not
+ // a kill.
+ if (!VRInfo.AliveBlocks[BBNum])
+ VRInfo.Kills.push_back(MI);
// Update all dominating blocks to mark them known live.
for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(),
}
}
-bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
- const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
- RegInfo = MF.getTarget().getRegisterInfo();
+bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
+ MF = &mf;
+ const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
+ RegInfo = MF->getTarget().getRegisterInfo();
assert(RegInfo && "Target doesn't have register information?");
- AllocatablePhysicalRegisters = RegInfo->getAllocatableSet(MF);
+ ReservedRegisters = RegInfo->getReservedRegs(mf);
// PhysRegInfo - Keep track of which instruction was the last use of a
// physical register. This is a purely local property, because all physical
/// Get some space for a respectable number of registers...
VirtRegInfo.resize(64);
- analyzePHINodes(MF);
+ analyzePHINodes(mf);
// Calculate live variable information in depth first order on the CFG of the
// function. This guarantees that we will see the definition of a virtual
// register before its uses due to dominance properties of SSA (except for PHI
// nodes, which are treated as a special case).
//
- MachineBasicBlock *Entry = MF.begin();
+ MachineBasicBlock *Entry = MF->begin();
std::set<MachineBasicBlock*> Visited;
for (df_ext_iterator<MachineBasicBlock*> DFI = df_ext_begin(Entry, Visited),
E = df_ext_end(Entry, Visited); DFI != E; ++DFI) {
MachineBasicBlock *MBB = *DFI;
- // Mark live-in registers as live-in.
- for (MachineBasicBlock::livein_iterator II = MBB->livein_begin(),
+ // Mark live-in registers as live-in.
+ for (MachineBasicBlock::const_livein_iterator II = MBB->livein_begin(),
EE = MBB->livein_end(); II != EE; ++II) {
assert(MRegisterInfo::isPhysicalRegister(*II) &&
"Cannot have a live-in virtual register!");
if (MRegisterInfo::isVirtualRegister(MO.getReg())){
HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI);
} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
- AllocatablePhysicalRegisters[MO.getReg()]) {
+ !ReservedRegisters[MO.getReg()]) {
HandlePhysRegUse(MO.getReg(), MI);
}
}
// Defaults to dead
VRInfo.Kills.push_back(MI);
} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
- AllocatablePhysicalRegisters[MO.getReg()]) {
+ !ReservedRegisters[MO.getReg()]) {
HandlePhysRegDef(MO.getReg(), MI);
}
}
// it as using all of the live-out values in the function.
if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
MachineInstr *Ret = &MBB->back();
- for (MachineFunction::liveout_iterator I = MF.liveout_begin(),
- E = MF.liveout_end(); I != E; ++I) {
+ for (MachineFunction::liveout_iterator I = MF->liveout_begin(),
+ E = MF->liveout_end(); I != E; ++I) {
assert(MRegisterInfo::isPhysicalRegister(*I) &&
"Cannot have a live-in virtual register!");
HandlePhysRegUse(*I, Ret);
// Convert and transfer the dead / killed information we have gathered into
// VirtRegInfo onto MI's.
//
- for (unsigned i = 0, e = VirtRegInfo.size(); i != e; ++i)
- for (unsigned j = 0, e = VirtRegInfo[i].Kills.size(); j != e; ++j) {
+ for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i)
+ for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) {
if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst)
addRegisterDead(i + MRegisterInfo::FirstVirtualRegister,
VirtRegInfo[i].Kills[j]);
// function. If so, it is due to a bug in the instruction selector or some
// other part of the code generator if this happens.
#ifndef NDEBUG
- for(MachineFunction::iterator i = MF.begin(), e = MF.end(); i != e; ++i)
+ for(MachineFunction::iterator i = MF->begin(), e = MF->end(); i != e; ++i)
assert(Visited.count(&*i) != 0 && "unreachable basic block found");
#endif
projects / oota-llvm.git / blobdiff