bool LowerExtract(MachineInstr *MI);
bool LowerInsert(MachineInstr *MI);
bool LowerSubregToReg(MachineInstr *MI);
+
+ void TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
+ const TargetRegisterInfo &TRI);
+ void TransferKillFlag(MachineInstr *MI, unsigned SrcReg,
+ const TargetRegisterInfo &TRI);
};
char LowerSubregsInstructionPass::ID = 0;
return new LowerSubregsInstructionPass();
}
+/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
+/// and the lowered replacement instructions immediately precede it.
+/// Mark the replacement instructions with the dead flag.
+void
+LowerSubregsInstructionPass::TransferDeadFlag(MachineInstr *MI,
+ unsigned DstReg,
+ const TargetRegisterInfo &TRI) {
+ for (MachineBasicBlock::iterator MII =
+ prior(MachineBasicBlock::iterator(MI)); ; --MII) {
+ if (MII->addRegisterDead(DstReg, &TRI))
+ break;
+ assert(MII != MI->getParent()->begin() &&
+ "copyRegToReg output doesn't reference destination register!");
+ }
+}
+
+/// TransferKillFlag - MI is a pseudo-instruction with SrcReg killed,
+/// and the lowered replacement instructions immediately precede it.
+/// Mark the replacement instructions with the kill flag.
+void
+LowerSubregsInstructionPass::TransferKillFlag(MachineInstr *MI,
+ unsigned SrcReg,
+ const TargetRegisterInfo &TRI) {
+ for (MachineBasicBlock::iterator MII =
+ prior(MachineBasicBlock::iterator(MI)); ; --MII) {
+ if (MII->addRegisterKilled(SrcReg, &TRI))
+ break;
+ assert(MII != MI->getParent()->begin() &&
+ "copyRegToReg output doesn't reference source register!");
+ }
+}
+
bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) {
MachineBasicBlock *MBB = MI->getParent();
MachineFunction &MF = *MBB->getParent();
assert(TargetRegisterInfo::isPhysicalRegister(SuperReg) &&
"Extract supperg source must be a physical register");
assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
- "Insert destination must be in a physical register");
+ "Extract destination must be in a physical register");
DOUT << "subreg: CONVERTING: " << *MI;
- if (SrcReg != DstReg) {
+ if (SrcReg == DstReg) {
+ // No need to insert an identify copy instruction.
+ DOUT << "subreg: eliminated!";
+ // Find the kill of the destination register's live range, and insert
+ // a kill of the source register at that point.
+ if (MI->getOperand(1).isKill() && !MI->getOperand(0).isDead())
+ for (MachineBasicBlock::iterator MII =
+ next(MachineBasicBlock::iterator(MI));
+ MII != MBB->end(); ++MII)
+ if (MII->killsRegister(DstReg, &TRI)) {
+ MII->addRegisterKilled(SuperReg, &TRI, /*AddIfNotFound=*/true);
+ break;
+ }
+ } else {
+ // Insert copy
const TargetRegisterClass *TRC = TRI.getPhysicalRegisterRegClass(DstReg);
assert(TRC == TRI.getPhysicalRegisterRegClass(SrcReg) &&
"Extract subreg and Dst must be of same register class");
TII.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRC, TRC);
-
+ // Transfer the kill/dead flags, if needed.
+ if (MI->getOperand(0).isDead())
+ TransferDeadFlag(MI, DstReg, TRI);
+ if (MI->getOperand(1).isKill())
+ TransferKillFlag(MI, SrcReg, TRI);
+
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);
unsigned DstReg = MI->getOperand(0).getReg();
unsigned InsReg = MI->getOperand(2).getReg();
- unsigned SubIdx = MI->getOperand(3).getImm();
+ unsigned InsSIdx = MI->getOperand(2).getSubReg();
+ unsigned SubIdx = MI->getOperand(3).getImm();
assert(SubIdx != 0 && "Invalid index for insert_subreg");
unsigned DstSubReg = TRI.getSubReg(DstReg, SubIdx);
-
+
assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
"Insert destination must be in a physical register");
assert(TargetRegisterInfo::isPhysicalRegister(InsReg) &&
DOUT << "subreg: CONVERTING: " << *MI;
- if (DstSubReg == InsReg) {
+ if (DstSubReg == InsReg && InsSIdx == 0) {
// No need to insert an identify copy instruction.
+ // Watch out for case like this:
+ // %RAX<def> = ...
+ // %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
+ // The first def is defining RAX, not EAX so the top bits were not
+ // zero extended.
DOUT << "subreg: eliminated!";
} else {
// Insert sub-register copy
const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+ // Transfer the kill/dead flags, if needed.
+ if (MI->getOperand(0).isDead())
+ TransferDeadFlag(MI, DstSubReg, TRI);
+ if (MI->getOperand(2).isKill())
+ TransferKillFlag(MI, InsReg, TRI);
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+ // Transfer the kill/dead flags, if needed.
+ if (MI->getOperand(0).isDead())
+ TransferDeadFlag(MI, DstSubReg, TRI);
+ if (MI->getOperand(1).isKill())
+ TransferKillFlag(MI, InsReg, TRI);
+
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);