MachineBasicBlock *MBB = MI->getParent();
MachineFunction &MF = *MBB->getParent();
const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
+ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
assert(MI->getOperand(0).isRegister() && MI->getOperand(0).isDef() &&
MI->getOperand(1).isRegister() && MI->getOperand(1).isUse() &&
assert(TRC == getPhysicalRegisterRegClass(MRI, SrcReg) &&
"Extract subreg and Dst must be of same register class");
- MRI.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRC, TRC);
+ TII.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRC, TRC);
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);
}
MachineBasicBlock *MBB = MI->getParent();
MachineFunction &MF = *MBB->getParent();
const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
+ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
unsigned DstReg = 0;
unsigned SrcReg = 0;
unsigned InsReg = 0;
} else {
TRC1 = MF.getRegInfo().getRegClass(InsReg);
}
- MRI.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC1, TRC1);
+ TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC1, TRC1);
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
assert(TRC0 == getPhysicalRegisterRegClass(MRI, SrcReg) &&
"Insert superreg and Dst must be of same register class");
- MRI.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRC0, TRC0);
+ TII.copyRegToReg(*MBB, MI, DstReg, SrcReg, TRC0, TRC0);
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
} else {
TRC1 = MF.getRegInfo().getRegClass(InsReg);
}
- MRI.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC1, TRC1);
+ TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC1, TRC1);
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;