[X86][Haswell][SchedModel] Add architecture specific scheduling models.

[oota-llvm.git] / lib / CodeGen / MachineCombiner.cpp

diff --git a/lib/CodeGen/MachineCombiner.cpp b/lib/CodeGen/MachineCombiner.cpp
index 591c4caf66ed0f220359ff5a829eb3838c8e8ba6..aeb864efa340243c59c5528308894c7f634bbf36 100644 (file)
--- a/lib/CodeGen/MachineCombiner.cpp
+++ b/lib/CodeGen/MachineCombiner.cpp
@@ -144,8 +144,7 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
           InstrIdxForVirtReg.find(MO.getReg());
       if (II != InstrIdxForVirtReg.end()) {
         // Operand is new virtual register not in trace
-        assert(II->second >= 0 && II->second < InstrDepth.size() &&
-               "Bad Index");
+        assert(II->second < InstrDepth.size() && "Bad Index");
         MachineInstr *DefInstr = InsInstrs[II->second];
         assert(DefInstr &&
                "There must be a definition for a new virtual register");
@@ -274,7 +273,9 @@ bool MachineCombiner::preservesResourceLen(
 
   // Compute current resource length
 
-  ArrayRef<const MachineBasicBlock *> MBBarr(MBB);
+  //ArrayRef<const MachineBasicBlock *> MBBarr(MBB);
+  SmallVector <const MachineBasicBlock *, 1> MBBarr;
+  MBBarr.push_back(MBB);
   unsigned ResLenBeforeCombine = BlockTrace.getResourceLength(MBBarr);
 
   // Deal with SC rather than Instructions.
@@ -379,7 +380,7 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
             MBB->insert((MachineBasicBlock::iterator) & MI,
                         (MachineInstr *)InstrPtr);
           for (auto *InstrPtr : DelInstrs)
-            InstrPtr->eraseFromParent();
+            InstrPtr->eraseFromParentAndMarkDBGValuesForRemoval();
 
           Changed = true;
           ++NumInstCombined;
@@ -405,10 +406,10 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
 }
 
 bool MachineCombiner::runOnMachineFunction(MachineFunction &MF) {
-  TII = MF.getTarget().getInstrInfo();
-  TRI = MF.getTarget().getRegisterInfo();
   const TargetSubtargetInfo &STI =
       MF.getTarget().getSubtarget<TargetSubtargetInfo>();
+  TII = STI.getInstrInfo();
+  TRI = STI.getRegisterInfo();
   SchedModel = STI.getSchedModel();
   TSchedModel.init(*SchedModel, &STI, TII);
   MRI = &MF.getRegInfo();