refactor some code, no functionality change

[oota-llvm.git] / lib / CodeGen / MachineInstr.cpp

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index e0444fa038103a5fe7ad477d40f84019137ceb5b..1c0d9cc4eb1c195d1efb270f2d6e6f5352d0b9d0 100644 (file)
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -18,7 +18,7 @@
 #include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Support/LeakDetector.h"
 #include "llvm/Support/Streams.h"
-#include <iostream>
+#include <ostream>
 using namespace llvm;
 
 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
@@ -169,8 +169,52 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
   }
 }
 
+/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
+/// the specific register or -1 if it is not found. It further tightening
+/// the search criteria to a use that kills the register if isKill is true.
+int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) {
+  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
+    MachineOperand &MO = getOperand(i);
+    if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
+      if (!isKill || MO.isKill())
+        return i;
+  }
+  return -1;
+}
+  
+/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
+/// the specific register or NULL if it is not found.
+MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
+  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
+    MachineOperand &MO = getOperand(i);
+    if (MO.isReg() && MO.isDef() && MO.getReg() == Reg)
+      return &MO;
+  }
+  return NULL;
+}
+  
+/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
+///
+void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
+  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = MI->getOperand(i);
+    if (!MO.isReg() || (!MO.isKill() && !MO.isDead()))
+      continue;
+    for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
+      MachineOperand &MOp = getOperand(j);
+      if (!MOp.isIdenticalTo(MO))
+        continue;
+      if (MO.isKill())
+        MOp.setIsKill();
+      else
+        MOp.setIsDead();
+      break;
+    }
+  }
+}
+
 void MachineInstr::dump() const {
-  llvm_cerr << "  " << *this;
+  cerr << "  " << *this;
 }
 
 static inline void OutputReg(std::ostream &os, unsigned RegNo,
@@ -232,6 +276,8 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
    // Specialize printing if op#0 is definition
   if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
     ::print(getOperand(0), OS, TM);
+    if (getOperand(0).isDead())
+      OS << "<dead>";
     OS << " = ";
     ++StartOp;   // Don't print this operand again!
   }
@@ -273,63 +319,61 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
   OS << "\n";
 }
 
-std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
+void MachineInstr::print(std::ostream &os) const {
   // If the instruction is embedded into a basic block, we can find the target
   // info for the instruction.
-  if (const MachineBasicBlock *MBB = MI.getParent()) {
+  if (const MachineBasicBlock *MBB = getParent()) {
     const MachineFunction *MF = MBB->getParent();
     if (MF)
-      MI.print(os, &MF->getTarget());
+      print(os, &MF->getTarget());
     else
-      MI.print(os, 0);
-    return os;
+      print(os, 0);
   }
 
   // Otherwise, print it out in the "raw" format without symbolic register names
   // and such.
-  os << MI.getInstrDescriptor()->Name;
+  os << getInstrDescriptor()->Name;
 
-  for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) {
-    os << "\t" << MI.getOperand(i);
-    if (MI.getOperand(i).isReg() && MI.getOperand(i).isDef())
+  for (unsigned i = 0, N = getNumOperands(); i < N; i++) {
+    os << "\t" << getOperand(i);
+    if (getOperand(i).isReg() && getOperand(i).isDef())
       os << "<d>";
   }
 
-  return os << "\n";
+  os << "\n";
 }
 
-std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
-  switch (MO.getType()) {
-  case MachineOperand::MO_Register:
-    OutputReg(OS, MO.getReg());
+void MachineOperand::print(std::ostream &OS) const {
+  switch (getType()) {
+  case MO_Register:
+    OutputReg(OS, getReg());
     break;
-  case MachineOperand::MO_Immediate:
-    OS << (long)MO.getImmedValue();
+  case MO_Immediate:
+    OS << (long)getImmedValue();
     break;
-  case MachineOperand::MO_MachineBasicBlock:
+  case MO_MachineBasicBlock:
     OS << "<mbb:"
-       << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
-       << "@" << (void*)MO.getMachineBasicBlock() << ">";
+       << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
+       << "@" << (void*)getMachineBasicBlock() << ">";
     break;
-  case MachineOperand::MO_FrameIndex:
-    OS << "<fi#" << MO.getFrameIndex() << ">";
+  case MO_FrameIndex:
+    OS << "<fi#" << getFrameIndex() << ">";
     break;
-  case MachineOperand::MO_ConstantPoolIndex:
-    OS << "<cp#" << MO.getConstantPoolIndex() << ">";
+  case MO_ConstantPoolIndex:
+    OS << "<cp#" << getConstantPoolIndex() << ">";
     break;
-  case MachineOperand::MO_JumpTableIndex:
-    OS << "<jt#" << MO.getJumpTableIndex() << ">";
+  case MO_JumpTableIndex:
+    OS << "<jt#" << getJumpTableIndex() << ">";
     break;
-  case MachineOperand::MO_GlobalAddress:
-    OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
+  case MO_GlobalAddress:
+    OS << "<ga:" << ((Value*)getGlobal())->getName() << ">";
     break;
-  case MachineOperand::MO_ExternalSymbol:
-    OS << "<es:" << MO.getSymbolName() << ">";
+  case MO_ExternalSymbol:
+    OS << "<es:" << getSymbolName() << ">";
     break;
   default:
     assert(0 && "Unrecognized operand type");
     break;
   }
-
-  return OS;
 }
+