-// $Id$
-//***************************************************************************
-// File:
-// MachineInstr.cpp
+//===-- MachineInstr.cpp --------------------------------------------------===//
//
-// Purpose:
-//
-//
-// Strategy:
-//
-// History:
-// 7/2/01 - Vikram Adve - Created
-//**************************************************************************/
-
+//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/MachineFrameInfo.h"
-#include "llvm/Target/MachineRegInfo.h"
-#include "llvm/Target/MachineCacheInfo.h"
-#include "llvm/Method.h"
-#include "llvm/iOther.h"
-#include "llvm/Instruction.h"
-
-AnnotationID MachineCodeForMethod::AID(
- AnnotationManager::getID("MachineCodeForMethodAnnotation"));
-
-
-//************************ Class Implementations **************************/
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/Value.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/MRegisterInfo.h"
+using std::cerr;
+
+// Global variable holding an array of descriptors for machine instructions.
+// The actual object needs to be created separately for each target machine.
+// This variable is initialized and reset by class MachineInstrInfo.
+//
+// FIXME: This should be a property of the target so that more than one target
+// at a time can be active...
+//
+extern const MachineInstrDescriptor *TargetInstrDescriptors;
// Constructor for instructions with fixed #operands (nearly all)
-MachineInstr::MachineInstr(MachineOpCode _opCode,
- OpCodeMask _opCodeMask)
+MachineInstr::MachineInstr(MachineOpCode _opCode)
: opCode(_opCode),
- opCodeMask(_opCodeMask),
- operands(TargetInstrDescriptors[_opCode].numOperands)
+ operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()),
+ numImplicitRefs(0)
{
assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
}
// Constructor for instructions with variable #operands
-MachineInstr::MachineInstr(MachineOpCode _opCode,
- unsigned numOperands,
- OpCodeMask _opCodeMask)
- : opCode(_opCode),
- opCodeMask(_opCodeMask),
- operands(numOperands)
+MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
+ : opCode(OpCode),
+ operands(numOperands, MachineOperand()),
+ numImplicitRefs(0)
+{
+}
+
+/// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
+/// not a resize for them. It is expected that if you use this that you call
+/// add* methods below to fill up the operands, instead of the Set methods.
+/// Eventually, the "resizing" ctors will be phased out.
+///
+MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
+ bool XX, bool YY)
+ : opCode(Opcode),
+ numImplicitRefs(0)
{
+ operands.reserve(numOperands);
+}
+
+/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
+/// MachineInstr is created and added to the end of the specified basic block.
+///
+MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
+ unsigned numOperands)
+ : opCode(Opcode),
+ numImplicitRefs(0)
+{
+ assert(MBB && "Cannot use inserting ctor with null basic block!");
+ operands.reserve(numOperands);
+ MBB->push_back(this); // Add instruction to end of basic block!
+}
+
+
+// OperandComplete - Return true if it's illegal to add a new operand
+bool MachineInstr::OperandsComplete() const
+{
+ int NumOperands = TargetInstrDescriptors[opCode].numOperands;
+ if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
+ return true; // Broken!
+ return false;
+}
+
+
+//
+// Support for replacing opcode and operands of a MachineInstr in place.
+// This only resets the size of the operand vector and initializes it.
+// The new operands must be set explicitly later.
+//
+void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands)
+{
+ assert(getNumImplicitRefs() == 0 &&
+ "This is probably broken because implicit refs are going to be lost.");
+ opCode = Opcode;
+ operands.clear();
+ operands.resize(numOperands, MachineOperand());
}
void
-MachineInstr::SetMachineOperand(unsigned int i,
- MachineOperand::MachineOperandType operandType,
- Value* _val, bool isdef=false)
+MachineInstr::SetMachineOperandVal(unsigned i,
+ MachineOperand::MachineOperandType opType,
+ Value* V,
+ bool isdef,
+ bool isDefAndUse)
{
- assert(i < operands.size());
- operands[i].Initialize(operandType, _val);
- operands[i].isDef = isdef ||
- TargetInstrDescriptors[opCode].resultPos == (int) i;
+ assert(i < operands.size()); // may be explicit or implicit op
+ operands[i].opType = opType;
+ operands[i].value = V;
+ operands[i].regNum = -1;
+ operands[i].flags = 0;
+
+ if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
+ operands[i].markDef();
+ if (isDefAndUse)
+ operands[i].markDefAndUse();
}
void
-MachineInstr::SetMachineOperand(unsigned int i,
+MachineInstr::SetMachineOperandConst(unsigned i,
MachineOperand::MachineOperandType operandType,
- int64_t intValue, bool isdef=false)
+ int64_t intValue)
{
- assert(i < operands.size());
- operands[i].InitializeConst(operandType, intValue);
- operands[i].isDef = isdef ||
- TargetInstrDescriptors[opCode].resultPos == (int) i;
+ assert(i < getNumOperands()); // must be explicit op
+ assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
+ "immed. constant cannot be defined");
+
+ operands[i].opType = operandType;
+ operands[i].value = NULL;
+ operands[i].immedVal = intValue;
+ operands[i].regNum = -1;
+ operands[i].flags = 0;
+}
+
+void
+MachineInstr::SetMachineOperandReg(unsigned i,
+ int regNum,
+ bool isdef) {
+ assert(i < getNumOperands()); // must be explicit op
+
+ operands[i].opType = MachineOperand::MO_MachineRegister;
+ operands[i].value = NULL;
+ operands[i].regNum = regNum;
+ operands[i].flags = 0;
+
+ if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
+ operands[i].markDef();
+ insertUsedReg(regNum);
}
void
-MachineInstr::SetMachineOperand(unsigned int i,
- int regNum, bool isdef=false)
+MachineInstr::SetRegForOperand(unsigned i, int regNum)
{
- assert(i < operands.size());
- operands[i].InitializeReg(regNum);
- operands[i].isDef = isdef ||
- TargetInstrDescriptors[opCode].resultPos == (int) i;
+ assert(i < getNumOperands()); // must be explicit op
+ operands[i].setRegForValue(regNum);
+ insertUsedReg(regNum);
+}
+
+
+// Subsitute all occurrences of Value* oldVal with newVal in all operands
+// and all implicit refs. If defsOnly == true, substitute defs only.
+unsigned
+MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
+{
+ unsigned numSubst = 0;
+
+ // Subsitute operands
+ for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O)
+ if (*O == oldVal)
+ if (!defsOnly || O.isDef())
+ {
+ O.getMachineOperand().value = newVal;
+ ++numSubst;
+ }
+
+ // Subsitute implicit refs
+ for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
+ if (getImplicitRef(i) == oldVal)
+ if (!defsOnly || implicitRefIsDefined(i))
+ {
+ getImplicitOp(i).value = newVal;
+ ++numSubst;
+ }
+
+ return numSubst;
}
+
void
-MachineInstr::dump(unsigned int indent) const
+MachineInstr::dump() const
{
- for (unsigned i=0; i < indent; i++)
- cout << " ";
+ cerr << " " << *this;
+}
+
+static inline std::ostream&
+OutputValue(std::ostream &os, const Value* val)
+{
+ os << "(val ";
+ if (val && val->hasName())
+ return os << val->getName() << ")";
+ else
+ return os << (void*) val << ")"; // print address only
+}
+
+static inline void OutputReg(std::ostream &os, unsigned RegNo,
+ const MRegisterInfo *MRI = 0) {
+ if (MRI) {
+ if (RegNo < MRegisterInfo::FirstVirtualRegister)
+ os << "%" << MRI->get(RegNo).Name;
+ else
+ os << "%reg" << RegNo;
+ } else
+ os << "%mreg(" << RegNo << ")";
+}
+
+static void print(const MachineOperand &MO, std::ostream &OS,
+ const TargetMachine &TM) {
+ const MRegisterInfo *MRI = TM.getRegisterInfo();
+ bool CloseParen = true;
+ if (MO.opHiBits32())
+ OS << "%lm(";
+ else if (MO.opLoBits32())
+ OS << "%lo(";
+ else if (MO.opHiBits64())
+ OS << "%hh(";
+ else if (MO.opLoBits64())
+ OS << "%hm(";
+ else
+ CloseParen = false;
- cout << *this;
+ switch (MO.getType()) {
+ case MachineOperand::MO_VirtualRegister:
+ if (MO.getVRegValue()) {
+ OS << "%reg";
+ OutputValue(OS, MO.getVRegValue());
+ if (MO.hasAllocatedReg())
+ OS << "==";
+ }
+ if (MO.hasAllocatedReg())
+ OutputReg(OS, MO.getAllocatedRegNum(), MRI);
+ break;
+ case MachineOperand::MO_CCRegister:
+ OS << "%ccreg";
+ OutputValue(OS, MO.getVRegValue());
+ if (MO.hasAllocatedReg()) {
+ OS << "==";
+ OutputReg(OS, MO.getAllocatedRegNum(), MRI);
+ }
+ break;
+ case MachineOperand::MO_MachineRegister:
+ OutputReg(OS, MO.getMachineRegNum(), MRI);
+ break;
+ case MachineOperand::MO_SignExtendedImmed:
+ OS << (long)MO.getImmedValue();
+ break;
+ case MachineOperand::MO_UnextendedImmed:
+ OS << (long)MO.getImmedValue();
+ break;
+ case MachineOperand::MO_PCRelativeDisp: {
+ const Value* opVal = MO.getVRegValue();
+ bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
+ OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
+ if (opVal->hasName())
+ OS << opVal->getName();
+ else
+ OS << (const void*) opVal;
+ OS << ")";
+ break;
+ }
+ default:
+ assert(0 && "Unrecognized operand type");
+ }
+
+ if (CloseParen)
+ OS << ")";
}
-ostream&
-operator<< (ostream& os, const MachineInstr& minstr)
+void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) {
+ unsigned StartOp = 0;
+
+ // Specialize printing if op#0 is definition
+ if (getNumOperands() && operandIsDefined(0)) {
+ ::print(getOperand(0), OS, TM);
+ OS << " = ";
+ ++StartOp; // Don't print this operand again!
+ }
+ OS << TM.getInstrInfo().getName(getOpcode());
+
+ for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
+ if (i != StartOp)
+ OS << ",";
+ OS << " ";
+ ::print(getOperand(i), OS, TM);
+
+ if (operandIsDefinedAndUsed(i))
+ OS << "<def&use>";
+ else if (operandIsDefined(i))
+ OS << "<def>";
+ }
+
+ // code for printing implict references
+ if (getNumImplicitRefs()) {
+ OS << "\tImplicitRefs: ";
+ for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) {
+ OS << "\t";
+ OutputValue(OS, getImplicitRef(i));
+ if (implicitRefIsDefinedAndUsed(i))
+ OS << "<def&use>";
+ else if (implicitRefIsDefined(i))
+ OS << "<def>";
+ }
+ }
+
+ OS << "\n";
+}
+
+
+std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
{
- os << TargetInstrDescriptors[minstr.opCode].opCodeString;
+ os << TargetInstrDescriptors[minstr.opCode].Name;
for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
os << "\t" << minstr.getOperand(i);
- if( minstr.getOperand(i).opIsDef() )
+ if( minstr.operandIsDefined(i) )
+ os << "*";
+ if( minstr.operandIsDefinedAndUsed(i) )
os << "*";
}
-#undef DEBUG_VAL_OP_ITERATOR
-#ifdef DEBUG_VAL_OP_ITERATOR
- os << endl << "\tValue operands are: ";
- for (MachineInstr::val_const_op_iterator vo(&minstr); ! vo.done(); ++vo)
- {
- const Value* val = *vo;
- os << val << (vo.isDef()? "(def), " : ", ");
- }
-#endif
-
-
-
-#if 1
// code for printing implict references
-
unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
if( NumOfImpRefs > 0 ) {
-
- os << "\tImplicit:";
-
+ os << "\tImplicit: ";
for(unsigned z=0; z < NumOfImpRefs; z++) {
- os << minstr.getImplicitRef(z);
+ OutputValue(os, minstr.getImplicitRef(z));
if( minstr.implicitRefIsDefined(z)) os << "*";
+ if( minstr.implicitRefIsDefinedAndUsed(z)) os << "*";
os << "\t";
}
}
-
-#endif
-
-
- os << endl;
- return os;
-}
-
-static inline ostream&
-OutputOperand(ostream &os, const MachineOperand &mop)
-{
- Value* val;
- switch (mop.getOperandType())
- {
- case MachineOperand::MO_CCRegister:
- case MachineOperand::MO_VirtualRegister:
- val = mop.getVRegValue();
- os << "(val ";
- if (val && val->hasName())
- os << val->getName().c_str();
- else
- os << val;
- return os << ")";
- case MachineOperand::MO_MachineRegister:
- return os << "(" << mop.getMachineRegNum() << ")";
- default:
- assert(0 && "Unknown operand type");
- return os;
- }
+ return os << "\n";
}
-
-ostream&
-operator<<(ostream &os, const MachineOperand &mop)
+std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
{
- switch(mop.opType)
+ if (mop.opHiBits32())
+ os << "%lm(";
+ else if (mop.opLoBits32())
+ os << "%lo(";
+ else if (mop.opHiBits64())
+ os << "%hh(";
+ else if (mop.opLoBits64())
+ os << "%hm(";
+
+ switch (mop.getType())
{
case MachineOperand::MO_VirtualRegister:
- case MachineOperand::MO_MachineRegister:
os << "%reg";
- return OutputOperand(os, mop);
+ OutputValue(os, mop.getVRegValue());
+ if (mop.hasAllocatedReg()) {
+ os << "==";
+ OutputReg(os, mop.getAllocatedRegNum());
+ }
+ break;
case MachineOperand::MO_CCRegister:
os << "%ccreg";
- return OutputOperand(os, mop);
+ OutputValue(os, mop.getVRegValue());
+ if (mop.hasAllocatedReg()) {
+ os << "==";
+ OutputReg(os, mop.getAllocatedRegNum());
+ }
+ break;
+ case MachineOperand::MO_MachineRegister:
+ OutputReg(os, mop.getMachineRegNum());
+ break;
case MachineOperand::MO_SignExtendedImmed:
- return os << mop.immedVal;
+ os << (long)mop.getImmedValue();
+ break;
case MachineOperand::MO_UnextendedImmed:
- return os << mop.immedVal;
+ os << (long)mop.getImmedValue();
+ break;
case MachineOperand::MO_PCRelativeDisp:
{
const Value* opVal = mop.getVRegValue();
- bool isLabel = isa<Method>(opVal) || isa<BasicBlock>(opVal);
+ bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
os << "%disp(" << (isLabel? "label " : "addr-of-val ");
if (opVal->hasName())
- os << opVal->getName().c_str();
+ os << opVal->getName();
else
- os << opVal;
- return os << ")";
+ os << (const void*) opVal;
+ os << ")";
+ break;
}
default:
assert(0 && "Unrecognized operand type");
break;
}
- return os;
-}
-
-// Align data larger than one L1 cache line on L1 cache line boundaries.
-// Align all smaller data on the next higher 2^x boundary (4, 8, ...).
-//
-// THIS FUNCTION HAS BEEN COPIED FROM EMITASSEMBLY.CPP AND
-// SHOULD BE USED DIRECTLY THERE
-//
-inline unsigned int
-SizeToAlignment(unsigned int size, const TargetMachine& target)
-{
- unsigned short cacheLineSize = target.getCacheInfo().getCacheLineSize(1);
- if (size > (unsigned) cacheLineSize / 2)
- return cacheLineSize;
- else
- for (unsigned sz=1; /*no condition*/; sz *= 2)
- if (sz >= size)
- return sz;
-}
-
-static unsigned int
-ComputeMaxOptionalArgsSize(const TargetMachine& target, const Method* method)
-{
- const MachineFrameInfo& frameInfo = target.getFrameInfo();
-
- unsigned int maxSize = 0;
-
- for (Method::const_inst_iterator I=method->inst_begin(),E=method->inst_end();
- I != E; ++I)
- if ((*I)->getOpcode() == Instruction::Call)
- {
- CallInst* callInst = cast<CallInst>(*I);
- unsigned int numOperands = callInst->getNumOperands() - 1;
- int numExtra = (int) numOperands - frameInfo.getNumFixedOutgoingArgs();
- if (numExtra <= 0)
- continue;
-
- unsigned int sizeForThisCall;
- if (frameInfo.argsOnStackHaveFixedSize())
- {
- int argSize = frameInfo.getSizeOfEachArgOnStack();
- sizeForThisCall = numExtra * (unsigned) argSize;
- }
- else
- {
- assert(0 && "UNTESTED CODE: Size per stack argument is not fixed on this architecture: use actual arg sizes to compute MaxOptionalArgsSize");
- sizeForThisCall = 0;
- for (unsigned i=0; i < numOperands; ++i)
- sizeForThisCall += target.findOptimalStorageSize(callInst->
- getOperand(i)->getType());
- }
-
- if (maxSize < sizeForThisCall)
- maxSize = sizeForThisCall;
- }
-
- return maxSize;
-}
-
-
-/*ctor*/
-MachineCodeForMethod::MachineCodeForMethod(const Method* _M,
- const TargetMachine& target)
- : Annotation(AID),
- method(_M), compiledAsLeaf(false), staticStackSize(0),
- automaticVarsSize(0), regSpillsSize(0),
- currentOptionalArgsSize(0), maxOptionalArgsSize(0),
- currentTmpValuesSize(0)
-{
- maxOptionalArgsSize = ComputeMaxOptionalArgsSize(target, method);
- staticStackSize = maxOptionalArgsSize +
- target.getFrameInfo().getMinStackFrameSize();
-}
-
-int
-MachineCodeForMethod::allocateLocalVar(const TargetMachine& target,
- const Value* val,
- unsigned int size)
-{
- // Check if we've allocated a stack slot for this value already
- //
- int offset = getOffset(val);
- if (offset == INVALID_FRAME_OFFSET)
- {
- bool growUp;
- int firstOffset =target.getFrameInfo().getFirstAutomaticVarOffset(*this,
- growUp);
- unsigned char align;
- if (size == 0)
- {
- size = target.findOptimalStorageSize(val->getType());
- // align = target.DataLayout.getTypeAlignment(val->getType());
- }
-
- align = SizeToAlignment(size, target);
-
- offset = getAutomaticVarsSize();
- if (! growUp)
- offset += size;
-
- if (unsigned int mod = offset % align)
- {
- offset += align - mod;
- size += align - mod;
- }
-
- offset = growUp? firstOffset + offset
- : firstOffset - offset;
-
- offsets[val] = offset;
-
- incrementAutomaticVarsSize(size);
- }
- return offset;
-}
-
-int
-MachineCodeForMethod::allocateSpilledValue(const TargetMachine& target,
- const Type* type)
-{
- unsigned int size = target.findOptimalStorageSize(type);
- unsigned char align = target.DataLayout.getTypeAlignment(type);
-
- bool growUp;
- int firstOffset = target.getFrameInfo().getRegSpillAreaOffset(*this, growUp);
-
- int offset = getRegSpillsSize();
- if (! growUp)
- offset += size;
-
- if (unsigned int mod = offset % align)
- {
- offset += align - mod;
- size += align - mod;
- }
-
- offset = growUp? firstOffset + offset
- : firstOffset - offset;
+ if (mop.flags &
+ (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
+ MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))
+ os << ")";
- incrementRegSpillsSize(size);
-
- return offset;
-}
-
-int
-MachineCodeForMethod::allocateOptionalArg(const TargetMachine& target,
- const Type* type)
-{
- const MachineFrameInfo& frameInfo = target.getFrameInfo();
-
- int size = MAXINT;
- if (frameInfo.argsOnStackHaveFixedSize())
- size = frameInfo.getSizeOfEachArgOnStack();
- else
- {
- size = target.findOptimalStorageSize(type);
- assert(0 && "UNTESTED CODE: Size per stack argument is not fixed on this architecture: use actual argument sizes for computing optional arg offsets");
- }
- unsigned char align = target.DataLayout.getTypeAlignment(type);
-
- bool growUp;
- int firstOffset = frameInfo.getFirstOptionalOutgoingArgOffset(*this, growUp);
-
- int offset = getCurrentOptionalArgsSize();
- if (! growUp)
- offset += size;
-
- if (unsigned int mod = offset % align)
- {
- offset += align - mod;
- size += align - mod;
- }
-
- offset = growUp? firstOffset + offset
- : firstOffset - offset;
-
- incrementCurrentOptionalArgsSize(size);
-
- return offset;
-}
-
-void
-MachineCodeForMethod::resetOptionalArgs(const TargetMachine& target)
-{
- currentOptionalArgsSize = 0;
-}
-
-int
-MachineCodeForMethod::pushTempValue(const TargetMachine& target,
- unsigned int size)
-{
- // Compute a power-of-2 alignment according to the possible sizes,
- // but not greater than the alignment of the largest type we support
- // (currently a double word -- see class TargetData).
- unsigned char align = 1;
- for (; align < size && align < target.DataLayout.getDoubleAlignment();
- align = 2*align)
- ;
-
- bool growUp;
- int firstTmpOffset = target.getFrameInfo().getTmpAreaOffset(*this, growUp);
-
- int offset = currentTmpValuesSize;
- if (! growUp)
- offset += size;
-
- if (unsigned int mod = offset % align)
- {
- offset += align - mod;
- size += align - mod;
- }
-
- offset = growUp? firstTmpOffset + offset
- : firstTmpOffset - offset;
-
- currentTmpValuesSize += size;
- return offset;
-}
-
-void
-MachineCodeForMethod::popAllTempValues(const TargetMachine& target)
-{
- currentTmpValuesSize = 0;
-}
-
-int
-MachineCodeForMethod::getOffset(const Value* val) const
-{
- hash_map<const Value*, int>::const_iterator pair = offsets.find(val);
- return (pair == offsets.end())? INVALID_FRAME_OFFSET : (*pair).second;
-}
-
-void
-MachineCodeForMethod::dump() const
-{
- cout << "\n" << method->getReturnType()
- << " \"" << method->getName() << "\"" << endl;
-
- for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI)
- {
- BasicBlock* bb = *BI;
- cout << "\n"
- << (bb->hasName()? bb->getName() : "Label")
- << " (" << bb << ")" << ":"
- << endl;
-
- MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
- for (unsigned i=0; i < mvec.size(); i++)
- cout << "\t" << *mvec[i];
- }
- cout << endl << "End method \"" << method->getName() << "\""
- << endl << endl;
+ return os;
}
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