Fix PR number.

[oota-llvm.git] / lib / CodeGen / MachineInstr.cpp

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 01a3e3ee381a172d59f442dde4b6bdff3dc16b82..5de74efe96e33db6a187c996ff3c797b09051188 100644 (file)
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -39,7 +39,7 @@ void MachineInstr::addImplicitDefUseOperands() {
       Op.IsKill = false;
       Op.IsDead = false;
       Op.contents.RegNo = *ImpDefs;
-      Op.offset = 0;
+      Op.auxInfo.subReg = 0;
       Operands.push_back(Op);
     }
   if (TID->ImplicitUses)
@@ -51,7 +51,7 @@ void MachineInstr::addImplicitDefUseOperands() {
       Op.IsKill = false;
       Op.IsDead = false;
       Op.contents.RegNo = *ImpUses;
-      Op.offset = 0;
+      Op.auxInfo.subReg = 0;
       Operands.push_back(Op);
     }
 }
@@ -141,6 +141,21 @@ bool MachineInstr::OperandsComplete() const {
   return false;
 }
 
+/// getNumExplicitOperands - Returns the number of non-implicit operands.
+///
+unsigned MachineInstr::getNumExplicitOperands() const {
+  unsigned NumOperands = TID->numOperands;
+  if ((TID->Flags & M_VARIABLE_OPS) == 0)
+    return NumOperands;
+
+  for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
+    const MachineOperand &MO = getOperand(NumOperands);
+    if (!MO.isRegister() || !MO.isImplicit())
+      NumOperands++;
+  }
+  return NumOperands;
+}
+
 /// isIdenticalTo - Return true if this operand is identical to the specified
 /// operand.
 bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
@@ -169,15 +184,17 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
   }
 }
 
-/// findRegisterUseOperand() - Returns the MachineOperand that is a use of
-/// the specific register or NULL if it is not found.
-MachineOperand *MachineInstr::findRegisterUseOperand(unsigned Reg) {
+/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
+/// the specific register or -1 if it is not found. It further tightening
+/// the search criteria to a use that kills the register if isKill is true.
+int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) {
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
     MachineOperand &MO = getOperand(i);
     if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
-      return &MO;
+      if (!isKill || MO.isKill())
+        return i;
   }
-  return NULL;
+  return -1;
 }
   
 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
@@ -190,6 +207,19 @@ MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
   }
   return NULL;
 }
+
+/// findFirstPredOperand() - Find the first operand in the operand list that
+// is used to represent the predicate.
+MachineOperand *MachineInstr::findFirstPredOperand() {
+  const TargetInstrDescriptor *TID = getInstrDescriptor();
+  if (TID->Flags & M_PREDICATED) {
+    for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
+      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
+        return &getOperand(i);
+  }
+
+  return NULL;
+}
   
 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
 ///
@@ -211,6 +241,24 @@ void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
   }
 }
 
+/// copyPredicates - Copies predicate operand(s) from MI.
+void MachineInstr::copyPredicates(const MachineInstr *MI) {
+  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+  if (TID->Flags & M_PREDICATED) {
+    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
+        const MachineOperand &MO = MI->getOperand(i);
+        // Predicated operands must be last operands.
+        if (MO.isReg())
+          addRegOperand(MO.getReg(), false);
+        else {
+          addImmOperand(MO.getImm());
+        }
+      }
+    }
+  }
+}
+
 void MachineInstr::dump() const {
   cerr << "  " << *this;
 }