More constification of things. More comments added. No functionality

[oota-llvm.git] / lib / CodeGen / MachineInstr.cpp

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index f40ac91e744e402aa58b3bbe63c75a880c821285..911d5caa1d331d5267a569acd336552d00db3582 100644 (file)
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -11,6 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/Constants.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Value.h"
 #include "llvm/CodeGen/MachineFunction.h"
@@ -20,7 +21,7 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetInstrDesc.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Support/LeakDetector.h"
 #include "llvm/Support/Streams.h"
 #include <ostream>
@@ -138,6 +139,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
            getSubReg() == Other.getSubReg();
   case MachineOperand::MO_Immediate:
     return getImm() == Other.getImm();
+  case MachineOperand::MO_FPImmediate:
+    return getFPImm() == Other.getFPImm();
   case MachineOperand::MO_MachineBasicBlock:
     return getMBB() == Other.getMBB();
   case MachineOperand::MO_FrameIndex:
@@ -159,7 +162,7 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
 void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
   switch (getType()) {
   case MachineOperand::MO_Register:
-    if (getReg() == 0 || MRegisterInfo::isVirtualRegister(getReg())) {
+    if (getReg() == 0 || TargetRegisterInfo::isVirtualRegister(getReg())) {
       OS << "%reg" << getReg();
     } else {
       // If the instruction is embedded into a basic block, we can find the
@@ -197,6 +200,13 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
   case MachineOperand::MO_Immediate:
     OS << getImm();
     break;
+  case MachineOperand::MO_FPImmediate:
+    if (getFPImm()->getType() == Type::FloatTy) {
+      OS << getFPImm()->getValueAPF().convertToFloat();
+    } else {
+      OS << getFPImm()->getValueAPF().convertToDouble();
+    }
+    break;
   case MachineOperand::MO_MachineBasicBlock:
     OS << "mbb<"
        << ((Value*)getMBB()->getBasicBlock())->getName()
@@ -631,30 +641,34 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
   }
 
   if (getNumMemOperands() > 0) {
-    OS << ", SV:";
+    OS << ", Mem:";
     for (unsigned i = 0; i < getNumMemOperands(); i++) {
       const MemOperand &MRO = getMemOperand(i);
       const Value *V = MRO.getValue();
 
-      assert(V && "SV missing.");
       assert((MRO.isLoad() || MRO.isStore()) &&
              "SV has to be a load, store or both.");
       
       if (MRO.isVolatile())
-        OS << "Volatile";
+        OS << "Volatile ";
+
       if (MRO.isLoad())
         OS << "LD";
       if (MRO.isStore())
         OS << "ST";
         
-      OS  << MRO.getSize();
+      OS << "(" << MRO.getSize() << "," << MRO.getAlignment() << ") [";
       
-      if (!V->getName().empty())
-        OS << "[" << V->getName() << " + " << MRO.getOffset() << "]";
+      if (!V)
+        OS << "<unknown>";
+      else if (!V->getName().empty())
+        OS << V->getName();
       else if (isa<PseudoSourceValue>(V))
-        OS << "[" << *V << " + " << MRO.getOffset() << "]";
+        OS << *V;
       else
-        OS << "[" << V << " + " << MRO.getOffset() << "]";
+        OS << V;
+
+      OS << " + " << MRO.getOffset() << "]";
     }
   }
 
@@ -662,7 +676,7 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
 }
 
 bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
-                                     const MRegisterInfo *RegInfo,
+                                     const TargetRegisterInfo *RegInfo,
                                      bool AddIfNotFound) {
   bool Found = false;
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
@@ -675,8 +689,8 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
         MO.setIsKill();
         Found = true;
         break;
-      } else if (MRegisterInfo::isPhysicalRegister(Reg) &&
-                 MRegisterInfo::isPhysicalRegister(IncomingReg) &&
+      } else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
+                 TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
                  RegInfo->isSuperRegister(IncomingReg, Reg) &&
                  MO.isKill())
         // A super-register kill already exists.
@@ -695,7 +709,7 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
 }
 
 bool MachineInstr::addRegisterDead(unsigned IncomingReg,
-                                   const MRegisterInfo *RegInfo,
+                                   const TargetRegisterInfo *RegInfo,
                                    bool AddIfNotFound) {
   bool Found = false;
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
@@ -708,8 +722,8 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
         MO.setIsDead();
         Found = true;
         break;
-      } else if (MRegisterInfo::isPhysicalRegister(Reg) &&
-                 MRegisterInfo::isPhysicalRegister(IncomingReg) &&
+      } else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
+                 TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
                  RegInfo->isSuperRegister(IncomingReg, Reg) &&
                  MO.isDead())
         // There exists a super-register that's marked dead.
@@ -730,13 +744,13 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
 
 /// copyKillDeadInfo - copies killed/dead information from one instr to another
 void MachineInstr::copyKillDeadInfo(MachineInstr *OldMI,
-                                    const MRegisterInfo *RegInfo) {
+                                    const TargetRegisterInfo *RegInfo) {
   // If the instruction defines any virtual registers, update the VarInfo,
   // kill and dead information for the instruction.
   for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = OldMI->getOperand(i);
     if (MO.isRegister() && MO.getReg() &&
-        MRegisterInfo::isVirtualRegister(MO.getReg())) {
+        TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
       unsigned Reg = MO.getReg();
       if (MO.isDef()) {
         if (MO.isDead()) {