//
//===----------------------------------------------------------------------===//
+#include "llvm/Constants.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Value.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetInstrDesc.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/LeakDetector.h"
#include "llvm/Support/Streams.h"
#include <ostream>
getSubReg() == Other.getSubReg();
case MachineOperand::MO_Immediate:
return getImm() == Other.getImm();
+ case MachineOperand::MO_FPImmediate:
+ return getFPImm() == Other.getFPImm();
case MachineOperand::MO_MachineBasicBlock:
return getMBB() == Other.getMBB();
case MachineOperand::MO_FrameIndex:
void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
switch (getType()) {
case MachineOperand::MO_Register:
- if (getReg() == 0 || MRegisterInfo::isVirtualRegister(getReg())) {
+ if (getReg() == 0 || TargetRegisterInfo::isVirtualRegister(getReg())) {
OS << "%reg" << getReg();
} else {
// If the instruction is embedded into a basic block, we can find the
case MachineOperand::MO_Immediate:
OS << getImm();
break;
+ case MachineOperand::MO_FPImmediate:
+ if (getFPImm()->getType() == Type::FloatTy) {
+ OS << getFPImm()->getValueAPF().convertToFloat();
+ } else {
+ OS << getFPImm()->getValueAPF().convertToDouble();
+ }
+ break;
case MachineOperand::MO_MachineBasicBlock:
OS << "mbb<"
<< ((Value*)getMBB()->getBasicBlock())->getName()
}
if (getNumMemOperands() > 0) {
- OS << ", SV:";
+ OS << ", Mem:";
for (unsigned i = 0; i < getNumMemOperands(); i++) {
const MemOperand &MRO = getMemOperand(i);
const Value *V = MRO.getValue();
- assert(V && "SV missing.");
assert((MRO.isLoad() || MRO.isStore()) &&
"SV has to be a load, store or both.");
if (MRO.isVolatile())
- OS << "Volatile";
+ OS << "Volatile ";
+
if (MRO.isLoad())
OS << "LD";
if (MRO.isStore())
OS << "ST";
- OS << MRO.getSize();
+ OS << "(" << MRO.getSize() << "," << MRO.getAlignment() << ") [";
- if (!V->getName().empty())
- OS << "[" << V->getName() << " + " << MRO.getOffset() << "]";
+ if (!V)
+ OS << "<unknown>";
+ else if (!V->getName().empty())
+ OS << V->getName();
else if (isa<PseudoSourceValue>(V))
- OS << "[" << *V << " + " << MRO.getOffset() << "]";
+ OS << *V;
else
- OS << "[" << V << " + " << MRO.getOffset() << "]";
+ OS << V;
+
+ OS << " + " << MRO.getOffset() << "]";
}
}
}
bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
- const MRegisterInfo *RegInfo,
+ const TargetRegisterInfo *RegInfo,
bool AddIfNotFound) {
bool Found = false;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MO.setIsKill();
Found = true;
break;
- } else if (MRegisterInfo::isPhysicalRegister(Reg) &&
- MRegisterInfo::isPhysicalRegister(IncomingReg) &&
+ } else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isKill())
// A super-register kill already exists.
}
bool MachineInstr::addRegisterDead(unsigned IncomingReg,
- const MRegisterInfo *RegInfo,
+ const TargetRegisterInfo *RegInfo,
bool AddIfNotFound) {
bool Found = false;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MO.setIsDead();
Found = true;
break;
- } else if (MRegisterInfo::isPhysicalRegister(Reg) &&
- MRegisterInfo::isPhysicalRegister(IncomingReg) &&
+ } else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isDead())
// There exists a super-register that's marked dead.
/// copyKillDeadInfo - copies killed/dead information from one instr to another
void MachineInstr::copyKillDeadInfo(MachineInstr *OldMI,
- const MRegisterInfo *RegInfo) {
+ const TargetRegisterInfo *RegInfo) {
// If the instruction defines any virtual registers, update the VarInfo,
// kill and dead information for the instruction.
for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = OldMI->getOperand(i);
if (MO.isRegister() && MO.getReg() &&
- MRegisterInfo::isVirtualRegister(MO.getReg())) {
+ TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
unsigned Reg = MO.getReg();
if (MO.isDef()) {
if (MO.isDead()) {