Some platforms use the same name for 32-bit and 64-bit registers (like

[oota-llvm.git] / lib / CodeGen / MachineInstr.cpp

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 8aa854db72afa4f89035255e61ead95564ce2623..e9262652c433cba46c624c4ffa827f2aa6e394c2 100644 (file)
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -11,6 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/Constants.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Value.h"
 #include "llvm/CodeGen/MachineFunction.h"
@@ -18,8 +19,9 @@
 #include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetInstrDesc.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Support/LeakDetector.h"
 #include "llvm/Support/Streams.h"
 #include <ostream>
@@ -137,6 +139,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
            getSubReg() == Other.getSubReg();
   case MachineOperand::MO_Immediate:
     return getImm() == Other.getImm();
+  case MachineOperand::MO_FPImmediate:
+    return getFPImm() == Other.getFPImm();
   case MachineOperand::MO_MachineBasicBlock:
     return getMBB() == Other.getMBB();
   case MachineOperand::MO_FrameIndex:
@@ -158,7 +162,7 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
 void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
   switch (getType()) {
   case MachineOperand::MO_Register:
-    if (getReg() == 0 || MRegisterInfo::isVirtualRegister(getReg())) {
+    if (getReg() == 0 || TargetRegisterInfo::isVirtualRegister(getReg())) {
       OS << "%reg" << getReg();
     } else {
       // If the instruction is embedded into a basic block, we can find the
@@ -170,7 +174,7 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
               TM = &MF->getTarget();
       
       if (TM)
-        OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
+        OS << "%" << TM->getRegisterInfo()->get(getReg()).PrintableName;
       else
         OS << "%mreg" << getReg();
     }
@@ -186,9 +190,9 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
         NeedComma = true;
       }
       if (isKill() || isDead()) {
-        if (NeedComma)    OS << ",";
-        if (isKill()) OS << "kill";
-        if (isDead()) OS << "dead";
+        if (NeedComma) OS << ",";
+        if (isKill())  OS << "kill";
+        if (isDead())  OS << "dead";
       }
       OS << ">";
     }
@@ -196,6 +200,13 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
   case MachineOperand::MO_Immediate:
     OS << getImm();
     break;
+  case MachineOperand::MO_FPImmediate:
+    if (getFPImm()->getType() == Type::FloatTy) {
+      OS << getFPImm()->getValueAPF().convertToFloat();
+    } else {
+      OS << getFPImm()->getValueAPF().convertToDouble();
+    }
+    break;
   case MachineOperand::MO_MachineBasicBlock:
     OS << "mbb<"
        << ((Value*)getMBB()->getBasicBlock())->getName()
@@ -512,6 +523,12 @@ unsigned MachineInstr::getNumExplicitOperands() const {
 }
 
 
+/// isDebugLabel - Returns true if the MachineInstr represents a debug label.
+///
+bool MachineInstr::isDebugLabel() const {
+  return getOpcode() == TargetInstrInfo::LABEL && getOperand(1).getImm() == 0;
+}
+
 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
 /// the specific register or -1 if it is not found. It further tightening
 /// the search criteria to a use that kills the register if isKill is true.
@@ -624,30 +641,34 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
   }
 
   if (getNumMemOperands() > 0) {
-    OS << ", SV:";
+    OS << ", Mem:";
     for (unsigned i = 0; i < getNumMemOperands(); i++) {
       const MemOperand &MRO = getMemOperand(i);
       const Value *V = MRO.getValue();
 
-      assert(V && "SV missing.");
       assert((MRO.isLoad() || MRO.isStore()) &&
              "SV has to be a load, store or both.");
       
       if (MRO.isVolatile())
-        OS << "Volatile";
+        OS << "Volatile ";
+
       if (MRO.isLoad())
         OS << "LD";
       if (MRO.isStore())
         OS << "ST";
         
-      OS  << MRO.getSize();
+      OS << "(" << MRO.getSize() << "," << MRO.getAlignment() << ") [";
       
-      if (!V->getName().empty())
-        OS << "[" << V->getName() << " + " << MRO.getOffset() << "]";
+      if (!V)
+        OS << "<unknown>";
+      else if (!V->getName().empty())
+        OS << V->getName();
       else if (isa<PseudoSourceValue>(V))
-        OS << "[" << *V << " + " << MRO.getOffset() << "]";
+        OS << *V;
       else
-        OS << "[" << V << " + " << MRO.getOffset() << "]";
+        OS << V;
+
+      OS << " + " << MRO.getOffset() << "]";
     }
   }
 
@@ -655,7 +676,7 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
 }
 
 bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
-                                     const MRegisterInfo *RegInfo,
+                                     const TargetRegisterInfo *RegInfo,
                                      bool AddIfNotFound) {
   bool Found = false;
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
@@ -668,8 +689,8 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
         MO.setIsKill();
         Found = true;
         break;
-      } else if (MRegisterInfo::isPhysicalRegister(Reg) &&
-                 MRegisterInfo::isPhysicalRegister(IncomingReg) &&
+      } else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
+                 TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
                  RegInfo->isSuperRegister(IncomingReg, Reg) &&
                  MO.isKill())
         // A super-register kill already exists.
@@ -688,7 +709,7 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
 }
 
 bool MachineInstr::addRegisterDead(unsigned IncomingReg,
-                                   const MRegisterInfo *RegInfo,
+                                   const TargetRegisterInfo *RegInfo,
                                    bool AddIfNotFound) {
   bool Found = false;
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
@@ -701,8 +722,8 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
         MO.setIsDead();
         Found = true;
         break;
-      } else if (MRegisterInfo::isPhysicalRegister(Reg) &&
-                 MRegisterInfo::isPhysicalRegister(IncomingReg) &&
+      } else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
+                 TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
                  RegInfo->isSuperRegister(IncomingReg, Reg) &&
                  MO.isDead())
         // There exists a super-register that's marked dead.
@@ -723,13 +744,13 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
 
 /// copyKillDeadInfo - copies killed/dead information from one instr to another
 void MachineInstr::copyKillDeadInfo(MachineInstr *OldMI,
-                                    const MRegisterInfo *RegInfo) {
+                                    const TargetRegisterInfo *RegInfo) {
   // If the instruction defines any virtual registers, update the VarInfo,
   // kill and dead information for the instruction.
   for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = OldMI->getOperand(i);
     if (MO.isRegister() && MO.getReg() &&
-        MRegisterInfo::isVirtualRegister(MO.getReg())) {
+        TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
       unsigned Reg = MO.getReg();
       if (MO.isDef()) {
         if (MO.isDead()) {